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| Scroll Title |
|---|
| anchor | Table_OV_RST |
|---|
| title | Reset process. |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
Signal | B2B | I/O | Note |
|---|
RESETN | J17- 36 | Input | Connected to Push Button, BTN1 |
|
There is a DIP switch S1 provided for CPLD Enable and I/Os in order to configure the system controller CPLD. The DIP Switch setting must be like the following table.
| Scroll Title |
|---|
| anchor | Table_OV_DIP |
|---|
| title | CPLD Configuration |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
Signal | DIP | Default | Note |
|---|
CPLD_IO0 | S1A | On | SCL pin | | CPLD_IO1 | S1B | On | SDA pin | | CPLD_IO2 | S1C | On | PROGRAMN pin | | CPLD_JTAGEN | S1D | On | JTAGENB |
|
Signals, Interfaces and Pins
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