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Template Revision 12.0 8 - on construction Design Name always "TE Series Name" + Design name, for example "TEI0001 TE0720 Test Board" |
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Date | Quartus | Project Built | Authors | Description |
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2020-05-13 | 19.4 Pro | TEI0006-test_board_noprebuilt-quartus_19.4.0-20200513124953.zip TEI0006-test_board-quartus_19.4.0-20200513125247.zip | Thomas Dück | | 2020-03-09 | 19.4 Pro | TEI0006-test_board-quartus_19.4-20200309134933.zip TEI0006-test_board_noprebuilt-quartus_19.4-20200309135555.zip | Thomas Dück | |
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Software | Version | Note |
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Quartus Prime Pro | 19.4 | needed | NIOS II SBT for Eclipse | --- | neededoptional |
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Hardware
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Notes : - list of software which was used to generate the design
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Complete List is available on <design_name>/board_files/*_devices.csv
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Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | EMMC | Others | Notes |
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TEI0006-02-220-5I | 220-_5I-1GB_2GB | REV01, REV02 | 2 GB2GB | 128 MB128MB | NA | NA | NA |
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Design supports following carriers:
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Additional Hardware | Notes |
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USB Cable cable for JTAG/UART | Check Carrier Board and Programmer for correct type | RJ45 ethernet Cablecable | connect carrier board to network |
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Type | Location | Notes |
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Quartus | <design_name>/source_files/quartus | Quartus Project project will be generated by TE Scripts | Software | <design_name>/source_files/software | Additional Software software will be generated by TE Scripts |
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title | Prebuilt files (only on ZIP with prebult content) |
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File | File-Extension | Description |
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SOPC Information File | *.sopcinfo | File with description of the .qsys file to create software for the target hardware | SRAM Object File | *.sof | Ram Configuration Fileconfiguration file | JTAG indirect configuration file | *.jic | Flash configuration Filefile | Diverse Reports | --- | Report files in different formats | Software-Application-File | *.elf | Software Application application for NIOS II processor system |
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Reference Design is only usable with the specified Quartus version. Do never use different Versions versions of Quartus software for the same project.
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The Trenz Electronic FPGA Reference Designs are TCL-script based projectprojects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.
TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality
- Open create_project_win.cmd/create_project_linux.sh and follow instructions in "Messages" section:
Image RemovedImage Added'Create Project' GUI - example - Select board Board in "Board selection" section
- Click on "Create project" button to create project
- (optional for manual changes) Select correct Quartus install quartus installation path on "in "<design_name>/settings/design_basic_settings.cmdtcl"
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Note: - Programming and Startup procedure
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- Connect JTAG and power on carrier with module
- Open " create_project_win.cmd/create_project_linux.sh"
- select Select correct Board board in "Board selection" section
- Click on "Program device" button
- (if prebuilt files are available) : select "Program prebuilt file" and click on "Start program device"
- using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
- (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
- Click on "Start program device" button
JTAG
Not used on this Example.
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- Prepare HW like described on section TEI0006 Reference Design#Programming Programming
- Connect UART USB (most cases same as JTAG)
- Connect your board to the network
- Power On on PCB
UART
- Open Serial Console (e.g. puttyPuTTY)
Speed: 115200- COM Port: Win OS , see device manager, Linux OS see dmesg | grep tty (UART is *USB1)
- Speed: 11520
- Select "Implicit CR in every LF" in category "Terminal"
- Press reset button
- Simple Socket Server is starting up. Follow instructions on shell.
- If dhcp server is not available: open sdk software project in sdk gui (e.g. NIOS II SBT for Eclipse) and change predefined IP address in "simple_socket_server.h", build rebuild software project and download *.elf file to the device.Connect your board to the network
- Open command shell and enter "telnet <ip_address> 30" to connect to simple socket server
System Design - Quartus
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Image ModifiedBlock Design - NIOS_test_board.qsys |
Software Design - SDK
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Template location: <design_name>/source_files/software/
simple_socket_server
Software example "Simple Socket Server" from SDK software eclipse (modified source files for TEI0006 board).Template location: <basefolder>/source_files/software/simple_socket_server
Appx. A: Change History and Legal Notices
Document Change History
To get content of older revision got to "Change History" of this page and select older document revision number.
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| | 2020-03-18 | v.4 | Thomas Dück | | -- | all | Page info |
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