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The Spartan-3E architecture organizes I/Os into four I/O banks (see the table below).
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Voltage for banks B1, B2 and B3 is fixed respectively to 2,5 V, 3,3 V and 3,3 V.
Voltage VccIO for bank B0 shall span from 1.2 V to 3.3 V. VccIO can be supplied either externally or internally to the micromodule.
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| Spartan-3 I/Os are not 5 V tolerant. Applying more than the recommended operating voltages at any pin, results in a damaged FPGA (see Xilinx Answer AR#19146). |
VccIO can be externally supplied over the B2B connector J4. If bank B0 is not used, then VccIO can be left open.
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