Page History

...

USB communication tests

...

To test the USB communication in the Reference Architecture case is necessary:

to download the correct reference bitstream file in the FPGA and/or SPI Flash;
the USB FX2 microcontroller on the TE USB FX2 module should contain valid firmware;
the host computer should have a specific driver installed;
a USB cable should be used to connect the PC and the FPGA module (USB communication tests and/or power supply);
run the C# or C++ Reference Project test (link to add ???).

To completely test the Reference Architecture is necessary:

to download the bitstream file (that create the Microblaze system) and the demo.elf file or to be certain that this two are already downloaded before;
the USB FX2 microcontroller on the TE USB FX2 module should contain valid firmware;
the host computer should have a specific driver installed;
the host computer should have Xilinx EDK installed;
a JTAG adapter cable. We recommend using the Xilinx Platform Cable USB (USB ↔ JTAG) .;
a USB cable should be used to connect the PC and the FPGA module (USB communication tests and/or power supply);
run the C# or C++ Reference Project test (link to add ???)(USB communication tests + DMA tests).

The procedures are the following.

Procedure SDK: opening and update SDK project only ('updated' SW on 'NOT updated' HW) Compile and link time less than 1 minute.	Procedure XPS+SDK: opening and update both XPS and SDK projects ('updated' SW on 'not updated' HW') Resynthesis of reference HW could take from 10 minutes to 1 hour⁽¹⁾
Copy IP Cores and drivers used in TE reference projects
	Update XPS project from an old version to a new one
	Export the HW design to SDK
Open SDK project and (if needed) update the SDK project from an old version to a new one	Recreate SDK project using the new exported HW project
Generate a new link script
Download the bitstream to the FPGA
Check the fiirmware of FX2 microcontroler
Run the demo project
USB communication tests + DMA tests

...

C:\XilinxProject, if you have copied the folder "TE0xxx-Reference-Designs\reference-TE0xxx" to "C:\XilinxProject" ( "C:\XilinxProject\reference-TE0xxx" and "C:\XilinxProject\TE-EDK-IP");
otherwise you must copy the contents of GitHub's 'TE-EDK-IP' folder inside the already existent empty folder "TE0xxx-Reference-Designs\TE-EDK-IP".

Warningnote
You should not alter folder nesting because is a Xilinx Platform Studio requirements.

Tip

title	Choice assumed in this step and in the following ones.

From now on, the choice (1) is assumed.

...

...