Page History

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Reason: Recommended by Xilinx UG583.

Impact: None.

#5

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Changed R51 to 10K Ohm

Type: Schematic BOM change

Reason: Testpoints needed for improved automatic testing. Recommended by Xilinx DS925 v1.17

Impact: More testpoints availableNone.

#6 Fixed DDR4 connection (Alert)

Type: Schematic change

Reason: Was connected to  Alert signal was connected to VTT.

Impact: None. Alert signal connected to DDR_1V2.

#7 Added 3.3V signal to CPLD pin 5

Type: Schematic change

Reason: Request for power good signal at CPLD.

Impact: State of 3.3V rail can be evaluatet in CPLD Firmware.

#8 Added testpoints

Type: Schematic change

Reason: Testpoints needed for improved automatic testing.

Impact: More testpoints available.

#9 LIB components update

Type: Schematic change

Reason: Improve production yield.

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