Versions Compared

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.


Revision History

Expand
titleshow


Scroll Title
center
anchorTable_DRH
title-alignmenttitleDesign Revision History

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
sortByColumn1
sortEnabledfalse
cellHighlightingtrue


Version

Date

Vivado

Description

Author

1.02022-XX-XX2021.2initial releaseWaldemar Hanemann



Custom_table_size_100

Overview


This guide showcases the important components of the module-carrier combination TE0717 + TEB0717 and introduces the available script-based reference design to get the board up and running.


Figure 1: Module TE0717 with Carrier TEB0717

draw.io Diagram
bordertrue
diagramNameTe0717_incoming
simpleViewerfalse
width
linksauto
tbstyletop
lboxtrue
diagramWidth796
revision78


1 Getting Started with the TE0717

text ... General info about the TE0717, Features of the Board

What will be presented in this Getting Started Guide?


The module TE0717 has a Xilinx Spartan-7 FPGA onboard that allows you to create digital hardware and software designs.

Most of the FPGA IOs are accessible via the pins surrounding the spread arround the carrier. The TE0717 is assembled with HyperRAM(64 Mbit of memory), QSPI non-volatile Flash memory(64 Mbit) and plenty of IOs which enable great hardware expandability. For communication and configuration the carrier offers a JTAG/UART Interface.

..... .....


2 Official Documentation

  • Official links to the shop:
  • Technical Reference Manual:
  • Reference Designs - Description and Download:

3 TE0717 module + TEB0717 carrier - Hardware Features

  • FPGA
    • Xilinx Spartan-7 - XC7S25-1FTGB196C
  • Clocking
    • 100 MHz clock from clocking chip SiT8008 on TE0717 module
  • Memory
    • 8 MByte DDR HyperRAM
    • 8 MByte Quad-SPI Flash
  • Communication
    • Onboard USB-JTAGProgramming
  • Connectors
    • B2B connector - Module(JM1) to Carrier(JB1)
    • Unpopulated PIN Header on Module(J3, J4, J5)
  • Configuration and Debug
    • Onboard USB-JTAGinterface


Firgure 2: TE0717+TEB0717 Hardware Blockdiagram

draw.io Diagram
5
bordertrue
diagramNameTE0717_TEB0717_Hardware
simpleViewerfalse
width
linksauto
tbstyletop
lboxtrue
diagramWidth732
revision7

LED<->FPGA connections are as following, Table 1:

LEDColorSignal

FPGA Pin

Function
D1(on carrier)redB14_L24_PP10general purpose
D2(on carrier)greenB14_L24_NP11"
D1(on module)redLED1D14"
D2(on module)greenLED2C14"


Info

Information on all IOs and FPGA pin connections can be found in the schematics.


4 TE0717 Hardware Setup

  1. Before connecting the Board to the PC, make sure to properly mount the module TE0717 on onto the carrier TEB0717 via the B2B connector like in Figure 1.
  2. Next step: Check the Jumper setting
    Figure 3: Jumper setting

    The Voltage set with Jumper J1 determines the source of the input voltage for the voltages regulator chip U1. Either 5V from the MicroUSB port or 5V from pin header J4.

    With Jumper J2 the voltage VADJ is set to 3.3V that comes from the carriers voltage regulator chip U1. The 1.8V comes from the module. The Voltage VADJ is wired to the module and is used as the BANK34 supply voltage.

  3. Use a MicroUSB cable to connect your board to the PC.
  4. All the LEDs are simply routed to the FPGA, hence none of them should be turned on. If the qspi flash on the module is preloaded with a design though, it might be that some leds LEDs are blinking. The leds are connected to the FPGA as following:
    Information on signals and FPGA pins can be found in the schematics, Table 1:

    LEDColorSignal

    FPGA Pin

    FunctionD1(on carrier)redB14_L24_PP10general purposeD2(on carrier)greenB14_L24_NP11"D1(on module)redLED1D14"D2(on module)greenLED2C14"
  5. LED pins on the FPGA table !!!1
  • Modul aufstecken
  • jumper richtig setzen
  • MicroUSB Kabel einstecken
Jumper setting:
  1. In case the QSPI Flash is loaded with the reference design, you can connect to the board with a program like PuTTY. Just open up a serial session with baud-rate of 9600 and the right COM-port(visible in Device Manager).
    You may need to press the RESET-button.
    Figure 4: Terminal(MicroBlaze output)
    Image AddedImage Added

5 Reference Design Description

  • system requirements
  • what is implemented ? Block Design ?

The following Blockdiagram illustrates the different parts of the reference design and how they are connected to hardware.

6 Reference Design Hands on ?

Scroll Title
anchorFigure_BD
title-alignmentcenter
titleBlock Design

Image Added


  1. Create Project with script and flash the flash - simple use  the prebuilt stuff  - pretty much the "TE0717 test board" documentation
  2. details .. how to:
    1. change the blockdiagram and rebuilt the project
    2. modify the programm and reload it into the design
    3. flash the qspi flash with the new design







Scroll Only


HTML
<style>
.wiki-content .columnLayout .cell.aside {
width: 0%;
}</style>



Scroll pdf ignore


Custom_fix_page_content

Table of contents

Table of Contents
outlinetrue