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Version

Date

Vivado

Description

Reference Design Files

Author

1.02022-XX-XX2021.2initial release.zipWaldemar Hanemann



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Figure 1: Module TE0717 with Carrier TEB0717

Overview

This guide showcases the important components of the module-carrier combination TE0717 + TEB0717 and introduces the available script-based reference design to get the board up and running.

1 Prerequisites

HardwareSoftware
  • TE0717 module
  • TEB0717 carrier
  • Micro-USB cable
  • Vitis 2021.2 (Vivado included)
  • PuTTY (or any other serial communicator)


2 Getting Started with the TE0717

The module TE0717 has a Xilinx Spartan-7 FPGA onboard that allows you to create extensive digital hardware and software designs.

Most of the FPGA IOs are spread arround the carrier. The TE0717 is assembled with HyperRAM(64 Mbit), QSPI non-volatile Flash memory(64 Mbit) and plenty of IOs which enable great hardware expandability. For communication and configuration the carrier offers a JTAG/UART Interface.

This Getting Started Guide shows how to set up the board, attach the jumpers, wire it up and connect it with the software. Over the course of this guide we will go into "how to use the provided reference design" and touch several aspects of "how to modify the design according to your needs". This includes changing the Vivado Block Design, regenerating the bitstream and using the hardware export(.xsa file) in Vitis to develop software that runs on the MicroBlaze. We will not build the whole project from scratch here since that would go beyond the scope of this guide.

  • hardware setup
  • not from scratch, sprengt den umfang
  • introduce refrerence design wth microblaze
  • make the board output Hello Trenz via Microblaze
  • how you can use the vivado tools to modify designfiles according to your application needs
  • Features used in the referemce design

..... .....


3 Official Documentation

  • Official links to the shop:
  • Technical Reference Manual:
  • Reference Designs - Description and Download:

4 TE0717 module + TEB0717 carrier - Hardware Features

  • FPGA
    • Xilinx Spartan-7 - XC7S25-1FTGB196C
  • Clocking
    • 100 MHz clock from clocking chip SiT8008 on TE0717 module
  • Memory
    • 8 MByte DDR HyperRAM
    • 8 MByte Quad-SPI Flash
  • Communication
    • On carrier USB-JTAGProgramming
  • Connectors
    • B2B connector - Module(JM1) to Carrier(JB1)
    • Unpopulated PIN Header on carrier(J3, J4, J5)
  • Configuration and Debug
    • On carrier USB-JTAGinterface
  • Jumper
    • Adjustable BANK34 supply voltage (J2)
    • Power source (J1)
  • General Purpose I/O
    • 2x2 user LEDs (red,green)


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Firgure 2: TE0717+TEB0717 Hardware Blockdiagram

Basic IOs<->FPGA connections are as following, Table 1:


ColorSignal

FPGA Pin

Function
LED D1(on carrier)redB14_L24_PP10general purpose
LED D2(on carrier)greenB14_L24_NP11"
LED D1(on module)redLED1D14"
LED D2(on module)greenLED2C14"
Clock --CLK_100MG11singled ended 100MHz clock


Info

Information on IO routing and FPGA pin connections can be found in the schematics.


Hands-On

5 TE0717 Hardware Setup

  1. Before connecting the Board to the PC, make sure to properly mount the module TE0717 onto the carrier TEB0717 via the B2B connector like Figure 1.
  2. Check the Jumper setting

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    Figure 3: Jumper setting
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    The Voltage set with Jumper J1 determines the source of the input voltage for the voltages regulator chip U1. Either 5V from the MicroUSB port or 5V from pin header J4.

    With Jumper J2 the voltage VADJ is set to 3.3V that comes from the carriers voltage regulator chip U1. The 1.8V comes from the module. The Voltage VADJ is wired to the module and is used as the BANK34 supply voltage.

  3. Use a MicroUSB cable to connect your board to the PC.

  4. All the LEDs are simply routed to the FPGA, hence none of them should be turned on. If the qspi flash on the module is preloaded with a design though, it might be that some LEDs are blinking.

  5. In case the QSPI Flash is loaded with the reference design, you can connect to the board with a program like PuTTY. Just open up a serial session with baud-rate of 9600 and the right COM-port(visible in Device Manager).
    You may need to press the RESET-button.


    Figure 4: Terminal(MicroBlaze output)

6 Reference Design Description

  • system requirements - software installed ? Drivers ?
  • what is implemented ? Block Design ?

The following Blockdiagram illustrates the different parts of the reference design and how they are connected to hardware.

7 Reference Design Hands on ?

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  1. Create Project with script and flash the flash - simple use  the prebuilt stuff  - pretty much the "TE0717 test board" documentation
  2. details .. how to:
    1. change the blockdiagram and rebuilt the project
    2. modify the programm and reload it into the design
    3. flash the qspi flash with the new design







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