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Design Name always "TE Series Name" + Design name, for example "TEI0006 Test Board" Date | Version | Changes | Author |
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| 2021-06-15 | 1.2 | - table of content view
- template history
- placed a horizontal separation line under each chapter heading
- replaced <design name> by <project folder>
- update 19.x to 20.x
| JH,TD | 2020-11-24 | 1.1 | - add fix table of content
- add table size as macro
| JH | -- | 1.0 | -- | -- |
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Important General Note: Export PDF to download, if vivado revision is changed! Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro - Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
- ...
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Overview
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Quartus Design with NIOS II and software example "simple_socket_server" and "hello_tei0006".
Refer to http://trenz.org/tei0006-info for the current online version of this manual and other available documentation.
Key Features
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Notes : - Add basic key futures, which can be tested with the design
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Excerpt |
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- Quartus 20.4 Pro
- NIOS II
- UART
- ETH
- QSPI flash memory
- DDR3 memory
- User LED
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Revision History
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Notes : - add every update file on the download
- add design changes on description
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title | Design Revision History |
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Date | Quartus | Project Built | Authors | Description |
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2023-04-13 | 20.4 Pro | TEI0006-test_board_noprebuilt-quartus_20.4.0-20230411171022.zip TEI0006-test_board-quartus_20.4.0-20230411171231.zip | Thomas Dück | - change "Serial Flash Controller II" IP Core to "QUAD SPI Controller II" IP Core
- bugfix offset value of hex file
| 2021-06-15 | 20.4 Pro | TEI0006-test_board_noprebuilt-quartus_20.4.0-20210615142627.zip TEI0006-test_board-quartus_20.4.0-20210615142455.zip | Thomas Dück | - update to Quartus Prime Pro 20.4
- TE scripts update
- new assembly variants
| 2020-10-19 | 19.4 Pro | TEI0006-test_board_noprebuilt-quartus_19.4.0-20201019101920.zip TEI0006-test_board-quartus_19.4.0-20201019101840.zip | Thomas Dück | | 2020-05-13 | 19.4 Pro | TEI0006-test_board_noprebuilt-quartus_19.4.0-20200513124953.zip TEI0006-test_board-quartus_19.4.0-20200513125247.zip | Thomas Dück | | 2020-03-09 | 19.4 Pro | TEI0006-test_board-quartus_19.4-20200309134933.zip TEI0006-test_board_noprebuilt-quartus_19.4-20200309135555.zip | Thomas Dück | |
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Release Notes and Know Issues
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Notes :- add known Design issues and general notes for the current revision
- do not delete known issue, add fixed version time stamp if issue fixed
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title | Known Issues |
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Issues | Description | Workaround | To be fixed version |
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No known issues | --- | --- | --- |
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Requirements
Software
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Notes : - list of software which was used to generate the design
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title | Software |
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Software | Version | Note |
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Quartus Prime Pro | 20.4 | needed | NIOS II SBT for Eclipse | --- | optional |
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Hardware
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Notes : - list of software which was used to generate the design
- mark the module and carrier board, which was used tested with an *
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Complete List is available on <project folder>/board_files/*_devices.csv
Design supports following modules:
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anchor | Table_HWM |
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title-alignment | center |
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title | Hardware Modules |
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orientation | portrait |
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Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | EMMC | Others | Notes |
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TEI0006-03-220-5I* | 220_5I_2GB | REV03|REV02|REV01 | 2GB | 128MB | NA | NA | NA | TEI0006-03-APC13-R | APC13_R_128MB | REV03 | 128MB | 128MB | NA | NA | without ETH PHY | TEI0006-03-ANC13-R | ANC13_R_128MB | REV03 | 128MB | 128MB | NA | NA | without ETH PHY | TEI0006-03-ALC13-R | ALC13_R_128MB | REV03 | 128MB | 128MB | NA | NA | without ETH PHY |
*used as reference
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Design supports following carriers:
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anchor | Table_HWC |
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title-alignment | center |
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title | Hardware Carrier |
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orientation | portrait |
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Carrier Model | Notes |
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TEIB0006* |
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*used as reference |
Additional HW Requirements:
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anchor | Table_AHW |
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title-alignment | center |
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title | Additional Hardware |
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orientation | portrait |
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Additional Hardware | Notes |
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USB cable for JTAG/UART | Check Carrier Board and Programmer for correct type | RJ45 ethernet cable | connect carrier board to network |
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Content
For general structure and of the reference design, see Project Delivery - Intel devices
Design Sources
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Type | Location | Notes |
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Quartus | <project folder>/source_files/quartus <project folder>/source_files/<Board Part Short Name>/quartus | Quartus project will be generated by TE Scripts optional, source files for specific assembly variants | Software | <project folder>/source_files/software | Additional software will be generated by TE Scripts |
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Prebuilt
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Notes : - prebuilt files
- Template Table:
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title | Prebuilt files |
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File | File-Extension | Description |
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SOPC Information File | *.sopcinfo | File with description of the .qsys file to create software for the target hardware | SRAM Object File | *.sof | Ram configuration file | Programmer Object File | *.pof | FPGA configuration file | JTAG indirect configuration file | *.jic | Flash configuration file | Diverse Reports | --- | Report files in different formats | Software-Application-File | *.elf | Software application for NIOS II processor system |
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anchor | Table_PF |
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title-alignment | center |
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title | Prebuilt files (only on ZIP with prebult content) |
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orientation | portrait |
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repeatTableHeaders | default |
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File | File-Extension | Description |
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SOPC Information File | *.sopcinfo | File with description of the .qsys file to create software for the target hardware | SRAM Object File | *.sof | Ram configuration file | JTAG indirect configuration file | *.jic | Flash configuration file | Diverse Reports | --- | Report files in different formats | Software-Application-File | *.elf | Software application for NIOS II processor system |
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Download
Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.
Reference Design is available on:
Design Flow
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Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch. |
Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.
See also:
The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.
TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality
- Open create_project_win.cmd/create_project_linux.sh:
'Create Project' GUI example - Select Board in "Board selection"
- Click on "Create project" button to create project
- (optional for manual changes) Select correct quartus installation path in "<project folder>/settings/design_basic_settings.tcl"
Launch
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Note: - Programming and Startup procedure
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Programming
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Check Module and Carrier TRMs for proper HW configuration before you try any design. |
QSPI
- Connect JTAG and power on carrier with module
- Open create_project_win.cmd/create_project_linux.sh
- Select correct board in "Board selection"
- Click on "Program device" button
- if prebuilt files are available: select "Program prebuilt file"
- using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
- (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
- Click on "Start program device" button
JTAG
Not used on this Example.
Usage
- Prepare HW like described on section Programming
- Connect UART USB (most cases same as JTAG)
- Connect your board to the network
- Power on PCB
UART
- Open Serial Console (e.g. PuTTY)
- COM Port: Win OS see device manager, Linux OS see ls -l dev/serial/by-id (UART is *USB1)
- Speed: 115200
- Select "Implicit CR in every LF" in category "Terminal"
- Press reset button
- Console output depends on used Software project, see Software Design - SDK#Application
System Design - Quartus
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Note: - Description of Block Design - Project, Block Design - Platform Desginer, ... Block Design Pictures from Export...
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Block Design
The block designs may differ depending on the assembly variant.
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anchor | Figure_BD |
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title-alignment | center |
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title | Block Design - Project |
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anchor | Figure_BD |
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title-alignment | center |
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title | Block Design - Platform Designer |
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Block Design - NIOS_test_board.qsys |
Software Design - SDK
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Application
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---------------------------------------------------------- General Example: hello_tei0006 Hello TEI0006 is a Hello World example as endless loop instead of one console output. |
Used software project depends on board assembly variant. Template location: <project folder>/source_files/software/
hello_tei0006
Hello TEI0006 is a Hello World example as endless loop instead of one console output.
simple_socket_server
Software example "Simple Socket Server" from eclipse (modified source files for TEI0006 board).
- If DHCP Server is not available:
- Open software project in sdk gui (e.g. NIOS II SBT for Eclipse) and change predefined IP address in "simple_socket_server.h", rebuild software project and download *.elf file to the device.
- Open command shell and enter "telnet <ip_address> 30" to connect to simple socket server
Appx. A: Change History and Legal Notices
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Document Change History
To get content of older revision got to "Change History" of this page and select older document revision number.
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- Note this list must be only updated, if the document is online on public doc!
- It's semi automatically, so do following
Add new row below first Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template - Metadata is only used of compatibility of older exports
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title | Document change history |
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orientation | portrait |
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Date | Document Revision | Authors | Description |
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| modified-date |
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| modified-date |
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dateFormat | yyyy-MM-dd |
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| Page info |
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infoType | Current version |
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dateFormat | yyyy-MM-dd |
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prefix | v. |
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type | Flat |
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infoType | Modified by |
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type | Flat |
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| | 2021-07-26 | v.10 | Thomas Dück | - update to Quartus Prime Pro 20.4
- new assembly variants
- document style update
- script update
| 2020-10-19 | v.6 | Thomas Dück | | 2020-05-13 | v.5 | Thomas Dück | | 2020-03-18 | v.4 | Thomas Dück | | -- | all | Page info |
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infoType | Modified users |
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dateFormat | yyyy-MM-dd |
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type | Flat |
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| -- |
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Legal Notices
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| IN:Legal Notices |
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| IN:Legal Notices |
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