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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/SC-CPLD-Firmware |
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Table of contents
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| sequence | Priority | Condition | Description |
|---|---|---|---|
******** | highest | RESIN = LOW (low active) | external reset "RESIN" is pressed |
| *******o |
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| One of the Power Good Signals of internal Voltages DCDCs LOW | |||
| ****oooo | blink sequence not used | ||
| ***ooooo | blink sequence not used | ||
| **oooooo | PG_1V2_MGT or PG_1V0_MGT is zero | One of the Power Good Signals of MGT Voltages DCDCs LOW | |
*ooooooo | DONE = '0' | FPGA not programmed, wrong Bootmode? Check JTAGEN signal. No design on QSPI Flash? | |
| continuously ON | lowest | software controlled command: i2cset -y 0 0x20 0x05 <0x00 or 0x01> | If none of the above condition is met |
Green LED D2
| Blink sequence | Priority | Condition | Description |
|---|---|---|---|
******** | highest | PG_1V or PG_1V5 or PG_1V8 or PG_3V3 or |
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| blink sequence not used | |||
| ***ooooo | bootmode was changed via I2C. | command: i2cset -y 0 0x20 0x03 <0x02 or 0x00> | |
| **oooooo | blink sequence not used | ||
*ooooooo | blink sequence not used | ||
| UART activity | lowest | LED = MIO8 | If none of the above condition is met |
I2C Interface
This subsystem provides 2 x 32-bit (8 x 8-bit) of general purpose parallel input and output (I/O) expansion for the I2C bus protocol. Address of this module is 0x20. This module contains eight 8-bit registers for reading and writing (GPIO_register_1[7:0] to GPIO_register_1[31:24] and GPIO_register_2[7:0] to GPIO_register_2[31:24]) separately with address 0x00 to 0x07. These registers can be accessed with I2C commands in linux console or with i2c functions in FSBL code. To access these registers the following commands in linux console can be used:
To see the i2c bus addresses : i2cdetect -y -r 0To read register of i2c to GPIO module: i2cget -y 0 0x20 <register address>To write data in a register of i2c to GPIO module: i2cset -y 0 0x20 <register address> <data>
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All eight registers can be read, but only two of them can be written from the linux console.
| I2C Register | permissions | address | function | I2C command |
|---|---|---|---|---|
| GPIO_register_1(7 downto 0) | readable | 0x00 | contains the CPLD Firmware Revision (not the PCB revision) | read: i2cget -y 0 0x20 0x00 |
| GPIO_register_1(15 downto 8) | readable | 0x01 | contains the bootmode in bit 8 and bit 9. This register is read by the fsbl and printed in the console as the bootmode during power up | |
| GPIO_register_1(23 downto 16) | readable | 0x02 | Bit 17 to 23 contain the DCDC power good signals and the DONE pin | |
| GPIO_register_1(31 downto 24) | readable/writeable | 0x03 | Bit 24 and 25 contain the bootmode, JTAG(b 00) or QSPI(b 10) | write: i2cset -y 0 0x20 0x03 <0x02 or 0x00> |
| GPIO_register_2(7 downto 0) | readable | 0x04 | Bit 0 to 3 show the state of the reset signals PS_POR, PS_SRST, ETH1_RESET, OTG_RST | |
| GPIO_register_2(15 downto 8) | readable/writeable | 0x05 | Bit 8 can be controlled to change the state of the red LED D1 if no other red LED condition is met | write: i2cset -y 0 0x20 0x05 <0x00 or 0x01> |
| GPIO_register_2(23 downto 16) | readable | 0x06 | not used | |
| GPIO_register_2(31 downto 24) | readable | 0x07 | not used |
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Green LED D2
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Overview
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