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Impact: None. Minor changes in electrical characteristics.

#2 Changed

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DCDC TPS82085SIL (U5, U6, U7, U8) to MPM3834CGPA-Z and adapted power circuit.

Type: Schematic Change

Reason: BOM Optimization.

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Impact: None. Increased current output capability. Minor changes in electrical characteristics.

#4 Added power supervisor STM6710LWB6F (U12, U13) and connected

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system controller (U3) pin 25 to net "PG_SENSE" instead of 3.3 V.

Type: Schematic Change

Reason: Improve power monitoring.

Impact: Improved power monitoring circuit by supervising additional voltage rails. If monitored voltages are out of range signal "PG_SENSE" is triggered.

#5

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Connect DCDC EN63A0QI (U14) to I2C bus via

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resistor (R91, R92) (default: fitted) and optionally pull-up

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resistor (R45, R47) (default: not fitted).

Type: Schematic Change

Reason: Improvement of DCDC handling.

Impact: None. I2C bus has additional device with I2C address 0x61.

#6 Added diode (D2) between signals "INIT" and "PROG_B".

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Impact: None. Improve usable flash options.

#10 Added common mode voltage setting via

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resistor (R62, R64, R65, R66) for clock signals "PLL_CLK_P" and "PLL_CLK_N" termination.

Type: Schematic Change

Reason: Improve clock termination.

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Reason: Disable 245 Synchronous FIFO Mode externally.

Impact: None.

#12 Connected signal "RD_N" to FPGA via level translator (U10).

Type: Schematic Change

Reason: Enable Add 245 Synchronous FIFO Mode option.

Impact: None.

#13 Added pull-up resistor (R76) option and pull-down resistor (R78) option for signal "GPIO_0" (default for both resistors: not fitted).

Type: Schematic Change

Reason: Increase setting flexibility for FT600QAdd FT600Q GPIO0 setup option.

Impact: None.

#14 Added pull-up resistor (R77) option and pull-down resistor (R79) option for signal "GPIO_1" (default for both resistors: not fitted).

Type: Schematic Change

Reason: Increase setting flexibility for FT600QAdd FT600Q GPIO1 setup option.

Impact: None.

#15 Added capacitor (C174) for signal "FTDI_RESET_N".

Type: Schematic Change

Reason: Follow FTDI specificationrecommendation.

Impact: None.

#16 Added capacitor (C184) for FPGA.

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Reason: Signal termination.

Impact: None.

#19 Changed

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inductor (L1, L2, L3) from BKP0603HS121-T to MPZ0603S121HT000

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.

Type: BOM Change

Reason:EOL of component.

Impact: None.

#20 Changed capacitor (C80, C177) from 47 µF, 6.3 V, 0805 to 22 µF, 10 V, 0603.

Type: Schematic Change

Reason: BOM Optimization.

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Reason: BOM Optimization.

Impact: None.

#22 Changed 100 µF

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capacitor (C35, C45, C120, C144, C145, C146, C147, C148, C149) from 6.3 V, X5R, 1206 to 4 V, X6S, 0805.

Type: Schematic Change

Reason: BOM Optimization.

Impact: None.

#23 Changed capacitor (C103, C104) from 50 V, 0402 to 25 V, 0201.

Type: Schematic Change

Reason: BOM Optimization.

Impact: None.

#24 Changed

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resistor (R2, R7, R8, R29, R67, R68) from 4.87 kOhm to 4.7 kOhm.

Type: Schematic Change

Reason: BOM optimization.

Impact: None.

#25 Changed

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resistor (R53, R54) from 1 kOhm to 1.6 kOhm.

Type: Schematic Change

Reason: BOM optimization.

Impact: None.

#26 Changed resistor (R3) from 0402, 63 mW to 0201, 50 mW.

Type: Schematic Change

Reason: BOM optimization.

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Type: Schematic Change

Reason: Optimize placementPlacement optimization.

Impact: None.

#28 Added

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testpoint (TP23, TP24, TP25, TP26, TP27, TP28, TP29, TP30, TP31, TP32, TP33, TP34, TP39, TP40, TP(??? for AVCC). (ED: Which testpoint for AVCC is used ???)

Type: Schematic Change

Reason: Optimized placementVoltage and system monitoring improvement.

Impact: None.

#29 Updated board revision decoding at FPGA pins L6 (BV1).

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Method of Identification

Production Shipment Schedule

From September 2024, after old stock is gone. If the new revision is not suitable for your application and still the former revision of the board is needed, please contact us.

The revision number is shown on the top side of the PCB. Revision number position changes between REV02 and REV03 on top side of the PCB.

Image Added


Production Shipment Schedule

This change takes place with immediate effect. If the new revision is not suitable for your application and still the former revision of the board is needed, please contact us. ???


Contact Information

If you have any questions related to this PCN, please contact Trenz Electronics Technical Support at

Disclaimer

Any projected dates in this PCN are based on the most current product information at the time this PCN is being issued, but they may change due to unforeseen circumstances.  For the latest schedule and any other information, please contact your local Trenz Electronic sales office, technical support or local distributor.

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