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Custom_table_size_100

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  • Module: TRM Name always "TE Series Name" +TRM
    Example: "TE0728 TRM"

Template Change history:

DateVersionChangesAuthor

4.2
  • Changes Xilinx to AMD
ED

4.1
  • Minor changes
    • Notes
    • Tables
ED

4.0
  • Rework for smaller TRM which can be generated faster
    • Reduce Signal Interfaces Pin
    • Reduce On Board Periphery
    • Reduce Power
    • Move Configuration Signals from Overview to own section
JH

3.12
  • Version History
    • changed from list to table
  • all
    • changed title-alignment for tables from left to center
ma

3.11
  • update "Recommended Operating Conditions" section


3.1
  • New general notes for temperature range to "Recommended Operating Conditions"


3.02
  • add again fix table of content with workaround to use it for pdf and wiki
  • Export Link for key features examples
    • Notes for different Types (with and without Main FPGA)
  • Export Link for Signals, Interfaces and Pins examples
    • Notes for different Types (Modul, Modul Hybrid, Evalboard, Carrier)


3.01
  • remove fix table of content and page layout ( split page layout make trouble with pdf export)
  • changed and add note to signal and interfaces, to on board periphery section
  • ...(not finished)


3.00
  • → separation of Carrier/Module and evaluation kit TRM


2.15
  • add excerpt macro to key features


2.14
  • add fix table of content
  • add table size as macro



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Important General Note:

  • If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable
  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template:

        Scroll Title
        anchorFigure_anchorname
        title-alignmentcenter
        titleText


        Scroll Ignore

        Create DrawIO object here: Attention if you copy from other page, objects are only linked.


        Scroll Only

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed



      • Table template:

        • Layout macro can be use for landscape of large tables

      • Scroll Title
        anchorTable_tablename
        title-alignmentcenter
        titleText

        Scroll Table Layout
        orientationportrait
        sortDirectionASC
        repeatTableHeadersdefault
        sortByColumn1
        sortEnabledfalse
        cellHighlightingtrue

        ExampleComment
        12



    • The anchors of the Scroll Title should be named consistent across TRMs. A incomplete list of examples is given below

      • <type>_<main section>_<name>

        • type: Figure, Table
        • main section:
          • "OV" for Overview
          • "SIP" for Signal Interfaces and Pins,
          • "OBP" for On board Peripherals,
          • "PWR" for Power and Power-On Sequence,
          • "B2B" for Board to Board Connector,
          • "TS" for Technical Specification
          • "VCP" for Variants Currently in Production
          •  "RH" for Revision History
        • name: custom, some fix names, see below
      • Fix names:
        • "Figure_OV_BD" for Block Diagram

        • "Figure_OV_MC" for Main Components

        • "Table_OV_IDS" for Initial Delivery State

        • "Table_PWR_PC" for Power Consumption

        • "Figure_PWR_PD" for Power Distribution
        • "Figure_PWR_PS" for Power Sequence
        • "Figure_PWR_PM" for Power Monitoring
        • "Table_PWR_PR" for Power Rails
        • "Table_PWR_BV" for Bank Voltages
        • "Table_TS_AMR" for Absolute_Maximum_Ratings

        • "Table_TS_ROC" for Recommended_Operating_Conditions

        • "Figure_TS_PD" for Physical_Dimensions
        • "Table_VCP_SO" for TE_Shop_Overview
        • "Table_RH_HRH" for Hardware_Revision_History

        • "Figure_RH_HRN" for Hardware_Revision_Number
        • "Table_RH_DCH" for Document_Change_History
    • Use Anchor in the document: add link macro and add "#<anchorname>
    • Refer to Anchor from external : <page url>#<pagename without space characters>-<anchorname>



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-----------------------------------------------------------------------


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Note for Download Link of the Scroll ignore macro:


Scroll Ignore

Download PDF version of this document.

Overview

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Notes :

The Trenz Electronic TEB2000 carrier board provides functionality for development, evaluation and testing purposes of Trenz 4 x 5 cm SoMs (System on Module).

The carrier board is equipped with a broad range of various components and connectors for different configuration setups and needs. On-module functional components and multipurpose I/Os of the SoM's PL and PS logic are connected via board-to-board connectors to the carrier board components and connectors for easy user access.

See page "4 x 5 SoM Carriers" for more information about the SoM's supported by the TE0703 Carrier Board.

Refer to http://trenz.org/teb2000-info (Links is correct, url should be redirect to Resources Page, but is not) for the latest online version of this manual and other available documentation.

Key Features

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Note:
 'description: Important components and connector or other Features of the module
→ please sort and indicate assembly options

See examples for different types <Series Name> TRM Template section examples


Excerpt
  • On Board:
    • System Controller (SC) (LCMXO2-1200HC-4TG144I1))
    • Mini USB for JTAG and UART connection (FTDI FT2232H), compatible with AMD and other vendor development tools
    • Mini USB second UART connection (FTDI FT230XQ)
    • SDIO port expander
    • 4 x User LEDs
      • D1 and D2 are connected to the SC, their function depends on the firmware
      • D3 and D4 are connected to the SC and the 4 x 5 SoM and can be directly controlled by it
    • 2 x User push button
      • Connected to the SC, the fuction is firmware depend
      • Currently used for Hard and Soft -Reset
    • 4 User DIP switches
      • Enable/disable update of the SC
      • MIO0 (readable signal by SC and SoM)
      • 2 "mode" bits
  • Interface:
    • Trenz 4 x 5 SoM socket
      • 3 x Samtec LSHM series high-speed connectors
    • Micro SD card connector
    • 2 x VG96 backplane connectors (mounting holes and solder pads)
    • Mini or Normal USB for SoM USB-OTG connection 1)
    • RJ45 GbE connector
  • Power:
    • Overvoltage-, undervoltage- and reversed- supply-voltage-protection
    • Barrel jack for 5V power supply input
  • Dimension:
    • 100 mm x 64.5 mm
  • Notes
    • 1)Depends on assembly variant

Block Diagram

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add drawIO object in Scroll Ignore section and add reference image in Scroll Only.

Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .


Note

Title (not anchor) of all Scroll Title such as DrawIOs and Tables should be changed according to the Module name.

Example: TE0812 Block Diagram


Note

All created DrawIOs  should be named according to the Module name:

Example: DrawIO of TE0812 Block Diagram should be named TE0812_OV_BD



Scroll Title
anchorFigure_OV_BD
title-alignmentcenter
titleTExxxx block diagram


Scroll Ignore

draw.io Diagram
top
bordertrue
diagramNameTEB2000_OV_BD
simpleViewerfalse
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tbstylehidden
diagramDisplayName
lboxtrue
diagramWidth630
revision11


Scroll Only


Main Components

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Notes :

  • Picture of the PCB (top and bottom side) with labels of important components
  • Add List below
  1. System Controller (SC) CPLD, U5
  2. USB-to-JTAG/UART-FTDI, U4, U12
  3. UART LEVEL Shifter, U8
  4. SDIO Port Expander, U2
  5. I²C Repeater, U7
  6. Power Input Protection, U11
  7. DCDC, U3
  8. USB Power Supply Switch, U1
  9. Reset / Push button, S1, S6 NEU
  10. 4x Dip Switches, S2
  11. ULED1 D1 (red), D2 (green)
  12. FLED1 con to SC PL9A, D3 (red), D4 (green)
  13. Ethernet jack, J14
  14. Samtec Razor Beam™ LSHM-150/130 B2B connector, JB1, JB2, JB3
  15. Footprint for VG96 Connector / VG96 Connector, J1 and J2
  16. +5V power jack, J13
  17. microSD Card Socket, J3
  18. Bank IO Voltages jumper, J5, J8, J9, J10
  19. Mini USB Type B jack, J4 (FT2232H), J21 (FT230XQ)
  20. USB Host Connector, either a USB A jack, J6  or a Micro USB, J12
Note

For more information regarding how to add board photos, Please refer to "Diagram Drawing Guidline" .


Note

For more information regarding how to add board photos, Please refer to "Diagram Drawing Guidline" .


Scroll Title
anchorFigure_OV_MC
title-alignmentcenter
titleTExxxx main components


scroll-
Scroll Title
anchorFigure_OV_MC
title-alignmentcenter
titleTExxxx main components
scroll-ignore

draw.io Diagram
top
bordertrue
diagramNameTEB2000-01_Figure_OV_MC
simpleViewerfalse
width
linksauto
tbstylehidden
diagramDisplayName
lboxtrue
diagramWidth641642
revision2

Scroll Only

image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

U1, USB Power Supply Switch
U2, SDIO Port Expander
U3, DCDC
U4, U12, USB-to-JTAG/UART-FTDI
U5, System Controller (SC) CPLD
U7, I²C Repeater
U8, UART LEVEL Shifter
U11, Power Input Protection

S1, Push button Reset
S2, 4x Dip Switches
S6, Push button Soft Reset

J1, J2, Footprint for VG96 Connector / VG96 Connector
J3, Socket microSD Card
J4, Mini USB Type B jack (FT2232H)
J5, J8, J9, J10, Jumper Bank IO Voltages

J6, or J12,

3


Scroll Only

Image Added


  1. System Controller (SC) CPLD, U5
  2. USB-to-JTAG/UART-FTDI, U4, U12
  3. UART LEVEL Shifter, U8
  4. SDIO Port Expander, U2
  5. I²C Repeater, U7
  6. Power Input Protection, U11
  7. DCDC, U3
  8. USB Power Supply Switch, U1
  9. Reset / Push button, S1, S6
  10. 4x Dip Switches, S2
  11. ULED1 D1 (red), D2 (green)
  12. FLED1 con to SC PL9A, D3 (red), D4 (green)
  13. Ethernet jack, J14
  14. Samtec Razor Beam™ LSHM-150/130 B2B connector, JB1, JB2, JB3
  15. Footprint for VG96 Connector / VG96 Connector, J1 and J2
  16. +5V power jack, J13
  17. microSD Card Socket, J3
  18. Bank IO Voltages jumper, J5, J8, J9, J10
  19. Mini USB Type B jack, J4 (FT2232H), J21 (FT230XQ)
  20. USB Host Connector, either a USB A jack, J6  or a Micro USB

J13, +5V power jack
J14, Ethernet jack
J21, Mini USB Type B jack (FT230XQ)Dx, U-LED red and green (D1, D2), F-LED red and green (D3, D4)
  1. , J12

Initial Delivery State

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Note

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty



Scroll Title
anchorTable_OV_IDS
title-alignmentcenter
titleInitial delivery state of programmable devices on the module

Scroll Table Layout
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Storage device name

Content

Notes

EEPROMPreprogrammed with AMD programmer license

Do not overwrite!

System Controller CPLDPreprogrammed
with SC CPLD Firmware
The Firmware sources are available for modification to your needs.
Visit TE0703 Firmware for further information.

The carrier is shipped in the following configuration:

  • VCCIO -A/B/C/D voltage selection jumpers are all set to 1.8 V.
  • SD IO Voltage jumper J11 is set to 1.8 V.
  • VBat jumper J7 is set to gnd.
  • Switch S1 configured as reset button in CPLD.
  • The Base Board is shipped with two VG96 backplane connectors, which are not soldered.
  • S2 DIP switches are configured as follows:
    SwitchPositionSignal nameDescription
    S2-1OFFCM1

    PGOOD signal active state set to high.

    S2-2ONCM0

    FPGA access to SoM.

    See TE0703 Firmware section "JTAG" for access options.

    S2-3

    ONJTAGEN
    S2-4ONMIO0Boot source set to SD Card.
    See TE0703 Firmware section "Boot Mode" for access options.

Signals, Interfaces and Pins

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For subsection examples see: <Series Name> TRM Template section examples

Note
  • Table with all connectors and Designator
  • List of different interfaces per connector
  • IO CNT (for FPGA IOs where functionality can be changed by customer)


Connectors

Scroll Title
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titleBoard Connectors

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Connector TypeDesignator

ConnectionEndpointInterfaceIO CNTNotes
VG96J1JB1IO

48 SE / 24 DIFF

To SoM via JB1
3x 2.54 mm Pin HeaderJ7JB1Battery Voltage1To SoM via JB1.
1.2 to 1.5 Volt
RJ-45 Ethernet
J14JB1Ethernet8Gbit capable, Phy MDI to SoM, LEDs  to SC
VG96J2JB2IO48 SE / 24 DIFFTo SoM via JB2
VG96J2JB2IO18 SE / 9 DIFFTo SoM via JB2
VG96J1JB3IO36 SE / 18 DIFFTo SoM via JB3
Micro USB
Type A/B
or
USB Type A
Exclusive J6 or J12JB3USB 2.0 OTG3To SoM, Data ± and ID. Only on USB jack possible
VG96J2SCIO18To SC X0 unto X17
B2BJB2SCJTAG4To SC
B2BJB2SCReset, RESIN1To SC
Mini USB Type BJ4SCUSB 2.02To Carrier FTDI
Mini USB Type BJ21SCUSB 2.02To Carrier FTDI
B2BJB1SCUART2UART to SoM for application
B2BJB1SCUART2UART to SoM for HSS/System Boot 
microSD Card socketJ3SC or SoMSD6
VG96J1SoM and SCI²C2To SoM via JB1and SC



Test Points

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you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delete the Test Point section.

Example:

Test PointSignalNotes1)
TP1PWR_PL_OK

1) Direction:

    • IN: Input from the point of view of this board.
    • OUT: Output from the point of view of this board.


Scroll Title
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titleTest Points Information

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orientationportrait
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Test PointSignalDirection 1)Notes
TP15VININCarrier supply voltage
TP25VININCarrier supply voltage
TP3VININCarrier supply voltage after protection circuit
TP4VININCarrier supply voltage after protection circuit
TP53.3VOUTCarrier generated
TP63.3VOUTCarrier generated
TP7VCCIOAINIO Voltage, generted by SoM
TP8VCCIOAINIO Voltage, generted by SoM
TP9VCCIOBINIO Voltage, generted by SoM
TP10VCCIOBINIO Voltage, generted by SoM
TP11VCCIOCINIO Voltage, generted by SoM
TP12VCCIOCINIO Voltage, generted by SoM
TP13VCCIODINIO Voltage, generted by SoM
TP14VCCIODINIO Voltage, generted by SoM
TP15M1.8VOUTINIO Voltage, generted by SoM
TP16M1.8VOUTINIO Voltage, generted by SoM
TP17M3.3VOUTINIO Voltage, generted by SoM
TP18M3.3VOUTINIO Voltage, generted by SoM
TP19UART_VBUSINCarrier USB Bus Voltage
TP20UART_VBUSINCarrier USB Bus Voltage
TP21VCCJTAGINJTAG Reference Voltage generated, by the SoM
TP22VCCJTAGINJTAG Reference Voltage generated, by the SoM
TP233.3V_SDOUTCarrier microSD card Voltage
TP243.3V_SDOUTCarrier microSD card Voltage
TP25USB-VBUS_ROUTCarrier USB Bus Voltage
TP26USB-VBUS_ROUTCarrier USB Bus Voltage
TP27ETH-VCCIN
TP28ETH-VCCIN
TP29VbusINExternal/FTDI USB Bus Voltage
TP30VbusINExternal/FTDI USB Bus Voltage
TP31CM1IN


DIP Switches

TP32CM0IN
TP33MIO0IN
TP34JTAGENIN

1) Direction:

    • IN: Input from the point of view of this board.
    • OUT: Output from the point of view of this board.

On-board Peripherals

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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection by assigning advance link using: #NameOfTheSection

Example:

Chip/InterfaceDesignatorConnected ToNotes
ETH PHYU10
  • B2B connector J1
  • SoC MIO
Gigabit ETH PHY



Scroll Title
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title-alignmentcenter
titleOn board peripherals

Scroll Table Layout
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Chip/InterfaceDesignatorConnected ToNotes

System Controller

U5
  • SoM
  • FTDI
  • JB1 B2B connector
    UART, 6x MIO, 5x Config signals
  • JB2 B2B connector
    JTAG, RESIN and 18 IOs
  • SD Port Expander
    Channel B1, Channel Select, SD Interrupt
  • Push button S1
  • DIP Switch S2
  • All LEDs
The Firmware sources are available for modification to your needs.
Visit TEB2000 CPLD Firmware for further information.

FTDI FT2232H

U4
  • SC
  • J4
UART for Application

EEPROM

U10
  • FTDI

Preprogrammed with AMD programmer license.

Do not overwrite!

FTDI FT230XQ

U12
  • SC
  • J21

UART for HSS/System Boot

Oscillator

U6
  • U4 FTDI

12 MHz

SD IO Port Expander

U2
  • SC
  • Via JB1 B2B connector to SoM
  • microSD Card J3



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For example subsections see: <Series Name> TRM Template section examples

Configuration and System Control Signals

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  • Overview  all Controller signals, like Reset, Boote Mode, JTAG Interface(Connector or USB In case of FTDI)...
  • In case it's connected to CPLD always link to CPLD description and add not from the  current implementation here(in case it's available)


Scroll Title
anchorTable_OV_CNTRL
title-alignmentcenter
titleController signal.

Scroll Table Layout
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Physical defined Signals

Connector.Pin

Signal Name

Endpoint

Direction1)Description
S1.2 / S1.4S1SC.BANK-0.114IN

Reset push button.

Functions are firmware dependant.
Visit TE0703 CPLD - CC703S for further information.

S6.2 / S2.4SRSTJB3.56OUT

Soft reset push button for SoM.

S2.1CM1SC.BANK-1.75IN


S2.2CM0SC.BANK-1.76IN


S2.3JTAGENSC.BANK-0.120IN


S2.4MIO0JB1.88IN


J5.2VCCIOAJB1.10 / JB1.12 / J1B.VCCIOAINOUT
J8.2VCCIOBJB2.2 / JB2.4 / J1B.VCCIOBINOUT
J9.2VCCIOCJB2.6 / J2B.VCCIOCINOUT
J10.2VCCIODJB2.8 / JB2.10 / J2B.VCCIODINOUT

J3.9

SD_CDSC.Bank-1.93INSD Card socket Interrupt Signal


Software defined Signals

Connector.Pin

Signal Name

Endpoint

Direction1)Description
JB3.54VBUS_V_ENU1.4INEnable from SoM
JB3.56USB-VBUSU1.8 → R5 (12K) → JB3.56OUTSignal to SoM
U1.5USB_OCSC.BANK-1.73INSignal to SC
JB2.17RESINSC.BANK-0.119INOUTBetween SoM and SC
JB1.27EN1SC.BANK-1.81INOUTBetween SoM and SC
JB1.29PGOODSC.BANK-1.82INOUTBetween SoM and SC
JB1.31MODESC.BANK-1.83INOUTBetween SoM and SC
JB1.8NOSEQSC.BANK-1.78INOUTBetween SoM and SC
JB1.90PROGMODESC.BANK-1.104INOUTBetween SoM and SC
JB1.91 / JB1.86MIO14 / MIO15To SC.Bank-1.105 / SC.Bank-1.95INOUTUART to SoM 
JB1.100 / 98MIO12 / MIO13To SC.Bank-1.100 / SC.Bank-1.99INOUTSecond UART to SoM 
J1A.MIO10-SCL / J1A.MIO11-SDAMIO10-SCL / MIO10
MIO10-SDA / MIO11

JB1.96 / SC.Bank-1.MIO10
JB1.94 / SC.Bank-1.MIO11

INOUTI2C with 5.1 kOhm pull-up resistors.
To SoM and SC

1) Direction:

    • IN: Input from the point of view of this board.
    • OUT: Output from the point of view of this board.

Power and Power-On Sequence

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Enter the default value for power supply and startup of the module here.

  • Order of power provided Voltages and Reset/Enable signals

Link to Schematics, for power images or more details


Power Rails

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List of all power rails which are accessible by the customer

  • Main Power Rails and Variable Bank Power



Scroll Title
anchorTable_PWR_PR
title-alignmentcenter
titleModule power rails.

Scroll Table Layout
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Power Rail Name/ Schematic NameConnector + PinDirection1)Notes
5VIN J13.1IN
5VIN J2A.5VIN OUT
3.3VJ1C.3.3V / J2C.3.3V /
JB1.2 /  JB1.4/  JB1.6/  JB1.14/  JB1.16 /
JB2.1 / JB2.3 / JB2.5 / JB2.7
OUT
USB-VBUSJ6.1 / J12.1 / JB3.56OUT




M1.8VOUT

JB1.40 / J11.1INFrom SoM

M1.8VOUT

J5.3 / J8.3 / J9.3 / J10.3 /
J11.1
OUT

M3.3VOUT

JB2.9 / JB2.11INFrom SoM

M3.3VOUT

J5.1 / J8.1 / J9.1 / J10.1 /
J1C.M3.3VOUT / J2C.M3.3VOUT;
OUT

VCCJTAG

JB2.92INFrom SoM

ETH-VCC

JB1.13INFrom SoM
VCCIOAJB1.10 / JB1.12INAMD SoM abhängig
VCCIOAJ5.2 / J1B.VCCIOAOUTUse jumper J5  to select between M1.8VOUT or M3.3VOUT.
VCCIOBJB2.2 / JB2.4INAMD SoM abhängig
VCCIOBJ8.2 / J1B.VCCIOBOUTUse jumper J8  to select between M1.8VOUT or M3.3VOUT.
VCCIOCJB2.6INAMD SoM abhängig
VCCIOCJ9.2 / J2.VCCIOCOUTUse jumper J9  to select between M1.8VOUT or M3.3VOUT.
VCCIODJB2.8 / JB2.10INAMD SoM abhängig
VCCIODJ10.2 /  J2.VCCIODOUTUse jumper J10  to select between M1.8VOUT or M3.3VOUT.

1) Direction:

    • IN: Input from the point of view of this board.
    • OUT: Output from the point of view of this board.

Recommended Power up Sequencing

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List baseboard design hints for final baseboard development.


Scroll Title
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SequenceNet nameRecommended Voltage RangePull-up/down

Description

Notes
0---Configuration signal setup.See Configuration and System Control Signals.
15VIN5V (± 5 %)-Main Power supply via J13 Barrel Plug 2.1 mm.

Carrier and SoM power supply.
Minimal 1 A, maximal 4A. 

Power consumption depends mainly on design and cooling solution.

2M3.3VOUT
(JB2, 9, 11)
3.3 V (± 3 %) Schematic-

SoM generated voltage, 
which signals operational readyness of the SoM.


3---Apply voltages to Carrier powered external IO 
when voltages under point 2 are present.


Board to Board Connectors

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  • This section is optional and only for modules.
  • use "include page" macro and link to the general B2B connector page of the module series,

    For example: 6 x 6 SoM LSHM B2B Connectors

    Include Page
    PD:6 x 6 SoM LSHM B2B Connectors
    PD:6 x 6 SoM LSHM B2B Connectors

Include Page
PD:4 x 5 SoM LSHM B2B Connectors
PD:4 x 5 SoM LSHM B2B Connectors

Technical Specifications

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List of all power rails which are accessible by the customer

  • Main Power Rails and Variable Bank Power add boarder one time maximum Rating (Board will damaged)

Absolute Maximum Ratings *)

Scroll Title
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titleAbsolute maximum ratings

Scroll Table Layout
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Power Rail / Schematic NameDescriptionMinMaxUnitNotes
5VIN

Carrier supply voltage rail before the input voltage protection activates.

0

12

VVoltages in the range 4.06 to 5.58 V will trigger the input protection.
VCCIOA

Intended as Supply Voltage for a SoM IO Bank. Connects the external VG96 IO to the SoM.

Dependent on Carrier and SoM combination, their settings and your external IO devices connected to VG96.

--VVoltage intended to be supplied by either M1.8VOUT or M3.3VOUT.
VCCIOB

Intended as Supply Voltage for a SoM IO Bank. Connects the external VG96 IO to the SoM.

Dependent on Carrier and SoM combination, their settings and your external IO devices connected to VG96.

--VVoltage intended to be supplied by either M1.8VOUT or M3.3VOUT.
VCCIOC

Supplies SC IO Bank 2. Connects the external VG96 IO to the SoM and the Carrier SC.

Dependent on Carrier and SoM combination, their settings and your external IO devices connected to VG96.

-0.53.75V

Limited by Absolute Maximum Values of the Sc.

VCCIOD

Intended as Supply Voltage for a SoM IO Bank. Connects the external VG96 IO to the SoM.

Dependent on Carrier and SoM combination, their settings and your external IO devices connected to VG96.

--VVoltage intended to be supplied by either M1.8VOUT or M3.3VOUT.
M1.8VOUT

SoM supplied voltage.

Range based on Carrier (± 3 %). Consult SoM requirements.


-0.3M3.3VOUT +0.3 VV

Voltage limited by Q1/MP5077GG-Z Enabled Pin.

 –0.3V to Vcc +0.3 V
(M3.3VOUT-max = 4.6)

Connected SD cards might be destroyed above 1.95 V.

M3.3VOUT

SoM supplied voltage.

Range based on Carrier (± 3 %). Consult SoM requirements.

-0.54.6V

Limited by U2/TXS02612RTWR.

Connected SD cards might be destroyed above 3.6 V.

VCCJTAG

Supplies SC IO Bank 3.

JTAG Reference Voltage from SoM. Consult SoM documentation.

-0.53.75V
ETH-VCCETH Bias Voltage from SoM.
Consult SoM documentation.
--V


*) Stresses beyond those listed under TEB2000 TRM - New Carrier-Board may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these
   or any other conditions beyond those indicated under TEB2000 TRM - New Carrier-Board. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

Temperature Range:

This carrier board is capable to be operated at industrial grade temperatures.

  • Modules with industrial temperature grade are equipped with components that cover at least the range of -40°C to 85°C

Please check the operating temperature range of the mounted SoM and peripheral devices, which determines the operating temperature range of the overall system.

The Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Voltage Rails:


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Power Rail / Schematic NameDescriptionMinMaxUnitNotes
5VIN

Carrier supply voltage rail before the input voltage protection activates.

4.755.25VTolerance is ±5 %.
VCCIOA

Intended as Supply Voltage for a SoM IO Bank. Connects the external VG96 IO to the SoM.

Dependent on Carrier and SoM combination, their settings and your external IO devices connected to VG96.

1.75

3.4

V

Voltage intended to be supplied by either M1.8VOUT or M3.3VOUT.

VCCIOB

Intended as Supply Voltage for a SoM IO Bank. Connects the external VG96 IO to the SoM.

Dependent on Carrier and SoM combination, their settings and your external IO devices connected to VG96.

1.753.4V

Voltage intended to be supplied by either M1.8VOUT or M3.3VOUT.

VCCIOC

Supplies SC IO Bank 2. Connects the external VG96 IO to the SoM and the Carrier SC.

Dependent on Carrier and SoM combination, their settings and your external IO devices connected to VG96.

1.2

3.4

V

Voltage intended to be supplied by either M1.8VOUT or M3.3VOUT.

VCCIOD

Intended as Supply Voltage for a SoM IO Bank. Connects the external VG96 IO to the SoM.

Dependent on Carrier and SoM combination, their settings and your external IO devices connected to VG96.

1.753.4V

Voltage intended to be supplied by either M1.8VOUT or M3.3VOUT.

M1.8VOUT

SoM supplied voltage.
Range based on Carrier (± 3 %). Consult SoM requirements.


1.751.85V

Tolerance is ±3 %.

M3.3VOUT

SoM supplied voltage.

Range based on Carrier. Consult SoM requirements.

3.23.4VTolerance is ±3 %.


VCCJTAG

Supplies SC IO Bank 3.

JTAG Reference Voltage from SoM. Consult SoM documentation.

1.23.3VValues from Schematic.
ETH-VCCETH Bias Voltage from SoM.
Consult SoM documentation.
--V



Physical Dimensions

  • Carrier size: 100 mm x 64.5 mm. 
    Note that few parts are slightly hanging over the PCB edge. Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: 8 mm. 

    PCB thickness: 1.64 mm ± 10 %.

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In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM.

For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below:

https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF

Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guideline" .



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Currently Offered Variants 

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Set correct link to the shop page overview table of the product on English and German.

Example for TE0706:

    ENG Page: https://shop.trenz-electronic.de/en/search?sSearch=TE0706

    DEU Page: https://shop.trenz-electronic.de/de/search?sSearch=TE0706


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Trenz shop TEXXXX overview page
English pageGerman page


Revision History

Hardware Revision History

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Set correct links to download  Carrier, e.g. TE0706 REV02:

  TE0706-02  ->   https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0706/REV02/Documents

Note:

  • Date format:  YYYY-MM-DD
  • Example: 

    DateRevisionChangesDocumentation Link
    2020-11-25REV02
    • Resistors R14 and R15 was replaced by 953R (was 5K1)
    • Resistor R5 was replaced by 5K1, R8 by 953R (was 9K09 and 1K69 respectively)
    REV02


Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

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Create DrawIO object here: Attention if you copy from other page, objects are only linked.


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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed



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DateRevisionChangesPCN LinkDocumentation Link
2023-10-01Initial Revision



Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Document Change History

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  • Note this list must be only updated, if the document is online on public doc!
  • It's semi automatically, so do following
    • Add new row below first

    • Copy "Page Information Macro (date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

    • Metadata is only used of compatibility of older exports


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01



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  • --


Disclaimer

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IN:Legal Notices
IN:Legal Notices



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