Page History
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ILA Core Name | Sample Rate | Depth | Connection | |
---|---|---|---|---|
xmod_uart10MHz | 10 MS/s | 128K | UART RXD in XMOD connector | |
POF | 375MHz | 1 GS/s | 4K128K | LVDS input from POF fibre receiver |
J1_J2100MHz | 100 MS/s | 4K | J1: 42 pins, J2: 42 pins |
Sample depths can be increased for all modules with FPGA's larger than A15T.
Channel Name | Measurement Type | Connection |
---|---|---|
CFCLK | Frequency | Free running configuration clock, nominal 66MHz |
J1_FREQ | Frequency | input multiplexer, from any pin in J1 |
J1_DUTY | Duty Cycle | input multiplexer, from any pin in J1 |
J2_FREQ | Frequency | input multiplexer, from any pin in J2 |
J2_DUTY | Duty Cycle | input multiplexer, from any pin in J2 |
POF_FREQ | Frequency | LVDS input from POF receiver |
POF_DUTY | Duty Cycle | LVDS input from POF receiver |
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