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Getting this Design ported to any new board usually takes less than 5 minutes. So far all newly ported design for new boards have worked first time tested with 0 time wasted in debug or troubleshooting.
F32C Core
This is work to convert F32C into fully usable IP Catalog Processor IP Core.
Data and Instruction buses are exported as LMB Bus, then IPI Standard IP cores are used to add BRAM. The size of the BRAM can be selected in the Address Editor:
Setting F32C BRAM size in Vivado IPI Address Editor.
Overview
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