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Version | Vivado |
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SDK | PetaLinux | |
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2017.2 |
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Xilinx AR#68923 | Xilinx AR#69372 | ||
2017.1 | Xilinx AR#69074 | ||
2016.4 | Xilinx AR#66830 | Xilinx AR#68370 | |
2016.2 | Xilinx AR#66830 | Xilinx AR#66230 | Xilinx AR#67409 |
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Devices | Name | DOC ID | Description |
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All | Vivado Design Suite User Guide: Programming and Debugging | UG908 | Documents Vivado® tools for programming and debugging a Xilinx® FPGA design. Programming the FPGA includes generating a bitstream file from the implemented design and downloading the file to the target device. Also describes how to debug a design including RTL simulation and in-system debugging.
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Zynq, Artix, Kintex, Virtex | Vivado Design Suite Tutorial: Embedded Processor Hardware Design | UG940 | Demonstrates building a Zynq®-7000 All Programmable SoC processor-based design and a Microblaze™ processor design in the Vivado® tools. Uses the Vivado IP integrator to build a design and then debug the design with the Xilinx® Software Development Kit (SDK) and the Vivado logic analyzer.
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ZynqMP | Zynq UltraScale+ MPSoC: Embedded Design Tutorial | UG1209 | Demonstrates building a Zynq UltraScale+ MPSoC processor-based embedded design using Vivado® Design Suite and the Xilinx® Software Development Kit. Provides a hands-on tutorial for effective embedded system design.
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