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The 7 boot mode strapping pins (MIO2 ... MIO8) of the Xiliny Zynq Z-7010 device are hardware programmed on the board. They are evaluated by the Zynq device soon after the 'POR_B'.signal is deasserted to begin the boot process.

The TE0722 -02 FPGA board is hardware programmed to boot initially from the on-board QSPI flash memory U5. The JTAG interface of the module is provided for storing the data to the QSPI flash memory through the Zynq device in cascaded mode.

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