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This is work to convert F32C into fully usable IP Catalog Processor IP Core.

LMB Bus

LMB Bus is the simplest bus available in Vivado IP Catalog, adding it to the "wrap" around F32C Core is fairly simple.

Data and Instruction buses are exported as LMB Bus, then IPI Standard IP cores are used to add BRAM. The size of the BRAM can be selected in the Address Editor:

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Example F32C SoC using IOModule from Vivado IP Catalog, again the addresses for BRAM and the IOModule are assigned automatically and can be changed as needed in Address Editor.

AXI Bus