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Debug session in Vivado Labtools, when CPU Reset is asserted Instruction address bus freezes, but after release there seems to be no reset, F32C Core tries to continue from last PC Address.
WIP to be figured out why.
Example F32C SoC using IOModule from Vivado IP Catalog, again the addresses for BRAM and the IOModule are assigned automatically and can be changed as needed in Address Editor.
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