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Design Name always "TE Series Name" + Design name, for example "TEI0006 Test Board"

DateVersionChangesAuthor
2023-09-132.3
  • update to 22.x
  •  "select COM Port" → Linux command changed
TD
2022-06-152.2
  • add 'QSPI-Boot mode'
  • add 'Get prebuilt boot binaries'
  • changed SD-Boot mode chapter
  •  'Device Tree' chapter expanded
TD
2022-04-212.1
  • update to 21.x
TD
2022-02-282.0
  • add yocto to
    • Overview → Key Features
    • Overview → Requirements
    • Design Flow
    • Launch
  • add section 'Software Design - Yocto'
TD
2021-06-151.2
  • table of content view
  • template history
  • placed a horizontal separation line under each chapter heading
  • replaced <design name> by <project folder>
  • changed title-alignment for tables from left to center
  • update 19.x to 20.x
JH,TD
2020-11-241.1
  • add fix table of content
  • add table size as macro
JH
--1.0----



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Important General Note:

  • Export PDF to download, if vivado revision is changed!

  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template (note: inner scroll ignore/only only with drawIO object):

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        Scroll Ignore

        Create DrawIO object here: Attention if you copy from other page, use


        Scroll Only

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed



      • Table template:

        • Layout macro can be use for landscape of large tables
        • Set column width manually(can be used for small tables to fit over whole page) or leave empty (automatically)

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        12



  • ...

Overview

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Notes :

Nios V/m design example with SDRAM controller (AXI4), 3-axis Accelerometer and different LED sequences.

Refer to http://trenz.org/cyc1000-info for the current online version of this manual and other available documentation.

Key Features

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Notes :

  • Add basic key features, which can be tested with the design


Excerpt

Revision History

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Notes :

  • add every update file on the download
  • add design changes on description


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DateQuartusProject BuiltAuthorsDescription
2023-09-1322.1 Lite

TEI0003-test_board_noprebuilt-quartus_22.1std.2-20230913161158.zip

TEI0003-test_board-quartus_22.1std.2-20230913161214.zip

Thomas Dück
  • update to Quartus Prime Lite 22.1
  • new board variants
  • change to Nios V/m
  • TE scripts update
2022-04-2121.1 Lite

TEI0003-test_board_noprebuilt-quartus_21.1.0-20220421150041.zip

TEI0003-test_board-quartus_21.1.0-20220421150114.zip

Thomas Dück
  • update to Quartus Prime Lite 21.1
2021-07-0920.1 Lite

TEI0003-test_board_noprebuilt-quartus_20.1.1-20210709110930.zip

TEI0003-test_board-quartus_20.1.1-20210709110847.zip

Thomas Dück
  • update to Quartus Prime Lite 20.1
  • TE scripts update
2020-10-1919.1 Lite

TEI0003-test_board_noprebuilt-quartus_19.1.0-20201019101802.zip

TEI0003-test_board-quartus_19.1.0-20201019101738.zip

Thomas Dück
  • script update
  • bugfixes
2020-05-1319.1 Lite

TEI0003-test_board_noprebuilt-quartus_19.1.0-20200513080815.zip

TEI0003-test_board-quartus_19.1.0-20200513081030.zip

Thomas Dück
  • 19.1 update
2019-11-1118.1

TEI0003-test_board_noprebuilt-quartus_18.1-20191111104152.zip

TEI0003-test_board-quartus_18.1-20191111104339.zip

Thomas Dück
  • add bash files for Linux OS
2019-10-2918.1

TEI0003-test_board_noprebuilt-quartus_18.1-20191029121432.zip

TEI0003-test_board-quartus_18.1-20191029121225.zip

Thomas Dück
  • create project with TE scripts
  • new board variants
2019-04-0218.1TEI0003-02-test_board-quartus_18.1-20190402.zipThomas Dück
  • initial release


Release Notes and Know Issues

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Notes :
  • add known Design issues and general notes for the current revision
  • do not delete known issue, add fixed version time stamp if  issue fixed


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titleKnown Issues

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IssuesDescriptionWorkaroundTo be fixed version
No known issues---------


Requirements

Software

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Notes :

  • list of software which was used to generate the design


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SoftwareVersionNote
Quartus Prime Lite22.1stdNios V license is needed. For more information see: Intel Nios V Processors
RiscFree IDE for Intel FPGAs22.1stdneeded


Hardware

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Notes :

  • list of hardware which was used to generate the design
  • mark the module and carrier board, which was used tested with an *

Complete List is available on <project folder>/board_files/*_devices.csv

Design supports following modules:

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Module ModelPCB Revision SupportBoard Part Short NameSDRAMConfiguration flashOthersNotes
TEI0003-02REV01, REV02QFCR18MByte2MByte----
TEI0003-02AREV2QFCR18MByte2MByte----
TEI0003-03A-S001REV03QFCR4_S18MByte8MByte----
TEI0003-03-QFCR1AREV03QFCR18MByte2MByte----
TEI0003-03-QFCR4A*REV03QFCR48MByte8MByte----

*used as reference

Design supports following carriers:

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Carrier ModelNotes
---

*used as reference

Additional HW Requirements:

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Additional HardwareNotes
Micro USB cable for JTAG/UART--

*used as reference

Content

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Notes :

  • content of the zip file

For general structure and of the reference design, see Project Delivery - Intel devices

Design Sources

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TypeLocationNotes
Quartus<project folder>/source_files/quartus/Quartus project will be generated by TE Scripts
Software<project folder>/source_files/software/Additional software will be generated by TE Scripts


Prebuilt

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Notes :

  • prebuilt files
  • Template Table:

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      File

      File-Extension

      Description

      SOPC Information File*.sopcinfoFile with description of the .qsys file to create software for the target hardware
      SRAM Object File*.sofRam configuration file
      Programmer Object File*.pofFPGA configuration file
      JTAG Indirect Configuration file*.jicFlash configuration file
      Raw binary file*.rbfFPGA configuration file
      Diverse Reports---Report files in different formats
      Software-Application-File*.elfSoftware application for Nios II/Nios V processor system

      Device Tree

      *.dtbDevice tree blob
      SFP-File*.sfpBoot image with SPL (Secondary Program Loader)
      BIN-File*.binImage with linux kernel and ram disk
      CONF-File*.confBoot configuration file (extlinux.conf)
      Yocto linux image*.wicLinux image for SD card


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File

File-Extension

Description

SOPC Information File*.sopcinfoFile with description of the *.qsys file to create software for the target hardware
SRAM Object File*.sofRam configuration file
JTAG indirect configuration file*.jicFlash configuration file
Diverse Reports---Report files in different formats
Software Application File*.elfSoftware application for Nios V processor system


Download

Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.

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Reference Design is available on:

Design Flow

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Notes :
  • Basic Design Steps

  • Add/ Remove project specific description


Note

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch.

Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.

See also:


The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.

TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win OS and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality

  1. Open create_project_win.cmd/create_project_linux.sh:
  2. Select Board in "Board selection"
  3. Click on "Create project" button to create project
    1. (optional for manual changes) Select correct quartus installation path in "<project folder>/settings/design_basic_settings.tcl"

Launch

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Note:

  • Programming and Startup procedure

Programming

Note

Check Module and Carrier TRMs for proper HW configuration before you try any design.

Get prebuilt boot binaries

Note

Reference Design is also available with prebuilt files. It's recommended to use TE prebuilt files for first launch.

  1. Run create_project_win.cmd/create_project_linux.sh
  2. Select Module in 'Board selection'
  3. Click on 'Export prebuilt files' button
    1. Folder <project folder>/_binaries_<Article Name> with subfolder boot_linux will be generated and opened

Configuration Flash

  1. Connect the Module to USB-Port
  2. Open create_project_win.cmd/create_project_linux.sh
  3. Select correct board in "Board selection"
  4. Click on "Program device" button
    1. if prebuilt files are available: select "Program prebuilt file"
    2. using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
    3. (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
  5. Click on "Start program device" button

JTAG

Not used on this example.

Usage

  1. Prepare Hardware like described on section Programming
  2. Connect UART USB (most cases same as JTAG)

UART

  1. Open Serial Console (e.g. PuTTY)
    1. select COM Port

      Info

      Win OS: see device manager

      Linux OS: see ls -l dev/serial/by-id  (UART is *USB1)


    2. Speed: 115200
  2. Press reset button
  3. Console output depends on used Software project, see Software Design - SDK#Application

System Design - Quartus

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Note:

  • Description of Block Design - Project, Block Design - Platform Desginer, ... Block Design Pictures from Export...

Block Design

The block designs may differ depending on the assembly variant.

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Block Design - NIOS_test_board.qsys

Software Design - SDK

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Note:
  • optional chapter separate

  • sections for different apps

Application

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----------------------------------------------------------

General Example:

hello_tei0006

Hello TEI0006 is a Quartus Hello World example as endless loop instead of one console output.

Used software project depends on board assembly variant. Template location: <project folder>/source_files/software/

test_tei0003

Software example to test TEI0003 module.

  • You can select between following modes by pressing the user button:
    1. Spirit level
    2. Case statement sequence
    3. Shift register sequence
    4. Knightrider sequence
    5. Pulse-width modulation sequence

hello_tei0003

Software example with 'Hello TEI0003' console output in endless loop.

Appx. A: Change History and Legal Notices

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Document Change History

To get content of older revision got to "Change History" of this page and select older document revision number.

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  • Note this list must be only updated, if the document is online on public doc!
  • It's semi automatically, so do following
    • Add new row below first

    • Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

    • Metadata is only used of compatibility of older exports


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DateDocument Revision

Authors

Description

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  • update to Quartus Prime Lite 22.1
  • document style update
2022-04-22v.9Thomas Dückupdate to Quartus Prime Lite 21.1
2021-07-09v.8Thomas Dück
  • update to Quartus Prime Lite 20.1
  • document style update
  • script update
2020-10-09v.7Thomas Dück
  • script update
  • bugfixes
2020-05-13v.6Thomas Dück
  • 19.1 release
2019-11-11v.5Thomas Dück
  • add bash files for Linux OS
2019-10-29v.3Thomas Dück
  • change design to TE scripts
  • new board variants
2019-04-03v.2Thomas Dück
  • Initial release 18.1
--all

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--


Legal Notices

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IN:Legal Notices



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