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Type or FileVersion
Vivado Design Suite2017.4
Trenz Project Scripts2017.4.0810
Trenz <board_series>_board_files.csv1.3
Trenz apps_list.csv

2.0

Trenz zip_ignore_list.csv1.0
Trenz mod_bd.csv (not included)1.1

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File NameDescription
Design + Settings
_use_virtual_drive.cmd(Option) Create virtual drive for project execution. See Xilinx AR#52787
design_basic_settings.cmd

Settings for the other *.cmd files. Following Settings are avaliable:

  • General Settings:
    • (optional) DO_NOT_CLOSE_SHELL: Shell do not closed after processing
    • (optional) ZIP_PATH: Set Path to installed Zip-Program. Currently 7-Zip are supported. IUsed for predefined TCL-function to Backup project.
    • (optional) ENABLE_SDSOC: Enable SDSOC Setting. Currently only for some reference project as beta version!
  • Xilinx Setting:
    • XILDIR: Set Xilinx installation path (Default: c:\Xilinx).
    • VIVADO_VERSION: Current Vivado/LabTool/SDK Version (Example:2017.4). Don't change Vivado Version.
      • Xilinx Software will be searched in:
      • VIVADO (optional for project creation and programming): %XILDIR%\Vivado\%VIVADO_VERSION%\ and for SDSoC on %XILDIR%\SDx\%VIVADO_VERSION%\Vivado\

      • SDK (optional for software projects and programming): %XILDIR%\SDK\%VIVADO_VERSION%\

      • LabTools (optional for programming only): %XILDIR%\Vivado_Lab\%VIVADO_VERSION%\

      • SDSOC (optional): %XILDIR%\SDx\%VIVADO_VERSION%\
  • Board Setting:
    • PARTNUMBER: Set Board part number of the project which should be created
      • Available Numbers: (you can use ID,PRODID,BOARDNAME or SHORTNAME from TExxxx_board_file.csv list)
      • Used for project creation and programming
      • To create empty project without board part, used PARTNUMBER=-1 (use GUI to create your project. No block design tcl-file should be in /block_design)
      • Example TE0726 Module :
      • USE ID                 |USE PRODID                                   
        PARTNUMBER=1 |PARTNUMBER=te0726-01  
  • Programming Settings(program*file.cmd):
    • SWAPP: Select Software App, which should be configured.
      • Use the folder name of the <design_name>/prebuilt/boot_image/<partname>/* subfolder. The *bin,*.mcs or *.bit from this folder will be used.
      • If you will configure the raw *.bit or *.mcs  *.bin  from the <design_name>/prebuilt/hardware/<partname>/ folder, use @set SWAPP=NA or @set SWAPP="".
      • Example: SWAPP=hello_world   → used the file from prebuilt/boot_image/<partname>/hello_world
                        SWAPP=NA                → used the file from <design_name>/prebuilt/boot_image/<partname>/
    • PROGRAM_ROOT_FOLDER_FILE: If you want to program design file from the rootfolder <design_name>, set to 1
      • Attention: it should be only one *.bit, *.msc or *.bin file in the root folder.

  • Optional Settings:
    • XILINXGIT_DEVICETREE: can be used to generate device tree with SDK
  • Optional Debugging Flags:
    • XIL_CSE_ZYNQ_DISPLAY_UBOOT_MESSAGES: additinal micro uboot messages (Zynq)
    • XIL_CSE_ZYNQ_UBOOT_QSPI_FREQ_HZ: additinal micro uboot programming speed(Zynq)
    Internal Settings
    • TE_INTERNAL_EXPORT: property for autogenerated export
    • TE_INTERNAL_APP: property for autogenerated export
design_clear_design_folders.cmd(optional)  Attention: Delete "<design_name>/v_log/", "<design_name>/vivado/", "<design_name>/vivado_lab/", "<design_name>/sdsoc/", and "<design_name>/workspace/" directory with related documents! Type "Y" into the command line input to start deleting files
design_run_project_batchmode.cmd

(optional)  Create Project with setting from "design_basic_settings.cmd" and source folders. Build all Vivado hardware and software files if the sources are available.

Delete  "<design_name>/vivado/", and "<design_name>/workspace/hsi/" directory with related documents before Project will created.

Hardware Design

vivado_create_project_guimode.cmd

Create Project with setting from "design_basic_settings.cmd" and source folders. Vivado GUI will be opened during the process.

Delete "<design_name>/vivado/", and "<design_name>/workspace/" directory with related documents before Project will created.

If old vivado project exists, type "y" into the command line input to start project creation again.

vivado_create_project_batchmode.cmd

(optional)  Create Project with setting from "design_basic_settings.cmd" and source folders.

Delete  "<design_name>/vivado/", and "<design_name>/workspace/" directory with related documents before Project will created.

If old vivado project exists, type "y" into the command line input to start project creation again.

vivado_open_existing_project_guimode.cmdOpens an existing Project "<design_name>/vivado/<design_name>.xpr" and restore Script-Variables.
Software Design
sdk_create_prebuilt_project_guimode.cmd(optional) Create SDK project with hardware definition file from prebuild folder. It used the *.hdf from: <design_name>/prebuilt/hardware/<board_file_shortname>/. Set <board_file_shortname> and <app_name> in "design_basic_settings.cmd".
Programming
program_flash_binfile.cmd(optional) For Zynq Systems only. Programming Flash Memory via JTAG with specified Boot.bin. Used SDK Programmer (Same as SDK  "Program Flash") or LabTools Programmer (Vivado or LabTools only), depends on installion settings. Default, it used the boot.bin from: <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>. Settings are done in "design_basic_settings.cmd".
program_flash_mcsfile.cmd(optional) For Non-Zynq Systems only. Programming Flash Memory via JTAG with specified <design_name>.mcs. Used LabTools Programmer (Vivado or LabTools only), depends on installion settings. Default, it used the <design_name>.mcs from: <design_name>/prebuilt/hardware/<board_file_shortname>. Settings are done in "design_basic_settings.cmd".
program_fpga_bitfile.cmd(optional)  Programming FPGA via JTAG with specified <design_name>.bit. Used LabTools Programmer (Vivado or LabTools only), depends on installion settings. Default, it used the <design_name>.bit from: <design_name>/prebuilt/hardware/<board_file_shortname>. Settings are done in "design_basic_settings.cmd".
labtools_open_project_guimode.cmd

(optional)  Create or open an existing Vivado Lab Tools Project. (Additional TCL functions from Programming and Utilities Group are usable). Settings are done in "design_basic_settings.cmd".

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  • Variant 1 (recommended):
    • Typ function on Vivado TCL Console, ex.: TE::help
    • TE::help
      • Show all predefined TE-Script functions.
    • TE:<functionname> -help 
      • Show short description of this function.
      • Attention: If -help argument is set, all other args will be ignored. 
  • Variant 2:
    • Create your own function Button on the Vivado GUI:
      • Tools → Customize Commands → Customize Commands...
      • Push +
      • Type Name ex.: Run SDK
      • Press Enter
      • Select Run command and insert function:
        • Variante 1 (no Vivado request window for args):
          • insert function and used args, ex.: TE::sw_program_zynq -swapp hello_world
        • Variant 2 (Vivado request window for args):
          • insert function, ex.:TE::sw_program_zynq
          • Press Define Args...
          • For every arg:
            • Push (plus)
            • Typ Name, Comment, Default Value and set optional
            • Press Enter
            • Example for args:
              • Push (plus)
              • Index, Key Name, -swapp, (tick)
              • Push (plus)
              • Appname, Arg, hello_world, (tick)
               
      • Press Enter
      • A new Button is shown on the Vivado Gui.


Hardware Design

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Board Part Files

See also TE Board Part Files

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