Page History

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Changes

#3 Changed DCDC EN5311QI (U24, U25, U26) to

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MPM3834C and adapted power circuit.

Type: Schematic Change

Reason: EOL of Component.

Impact: None. Increased current output capability. Minor changes in electrical characteristics.

#1 Changed

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DCDC EN6347QI (U23)

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to MPM3860GQW-Z and adapted power circuit.

Type: Schematic Change

Reason: EOL of Component.

Impact: None. Increased current output capability. Minor changes in electrical characteristics.

#4 Changed load

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switch TPS27082LDDCR (Q1)

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to MP5077GG-Z and adapted circuit.

Type: Schematic Change

Reason: BOM Optimization.

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Reason: EOL of Component.

Impact: None.

#1 Changed power net name from 1.5V to DDR_VDD.

Type: Schematic Change

Reason: Improve name handling.

Impact: None.

#8 Changed power sequencing.

Type: Schematic Change

Reason: Follow AMD and Texas Instruments recommendation.

Impact: Voltage rails start in other order. Voltage supervisor (U4) enables 1V voltage rail (DCDC U23) via signal EN_Module. 1V DCDC (U23) enables 1.8V voltage rail (DCDC U25) via signal PG_1V0. 1.8V DCDC (U25) enables 2.5V (DCDC U24) and DDR_VDD (DCDC U26) voltage rails via signal PG_1V8. Voltage rail 3.3V (load switch Q1) is logical AND-enabled via power good signal PG_2V5_3V3 from voltage rail 2.5V DCDC (U24) and DDR_VDD DCDC (U26) via diode (D4) and CPLD (U6) signal EN_3V3 via diode (D5).

#10 Added additional decoupling capacitors C166...C179.

Type: Schematic Change

Reason: Improve decoupling.

Impact: None.

#10 Added level shifter (

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U7) and capacitors (C185, C186) to separate power domains for signal FPGA_IO. Added fallback resistor (R91).

Type: Schematic Change

Reason: Improve power domain handling for signal FPGA_IO.

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Reason: Improve thermal situation.

Impact: None.

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#10 Added additional decoupling capacitors C166...C179.

Type: Schematic Change

Reason:  Improve name handlingdecoupling.

Impact: None.

#1 Pulled-up board revision signal (FPGA U2 pin H17) and updated board revision documentation.

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Impact: None. Firmware reflects it but custom firmware needs to be updated by customer.

#19 Added revision history, block and power diagram. Updated page count and order. 

Type: Documentation Update

Reason: Documentation improvement.

Impact: None.

#11 Changed fiducials to standard fiducial type.

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Reason: Required for manufacturing.

Impact: None.

#19 Added revision history, block and power diagram. Updated page count and order. 

Type: Documentation Update

Reason: Documentation improvement.

Impact: None.

Method of Identification

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