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  • Install Xilinx Vivado Design Suite or Xilinx Vivado Webpack (free license for some FPGA only: see http://www.xilinx.com/products/design-tools/vivado/vivado-webpack.html)
    (optional) Install Xilinx Vivado LabTools (Lab Edition)
  • Configure the reference-design:
    1. Open “design_basic_settings.cmd” with a text-editor:
        a. Set correct Xilinx Environment:
            @set XILDIR=C:/Xilinx
            @set VIVADO_VERSION=2015.4
            Program settings will be search in :
            %XILDIR%/VIVADO/%VIVADO_VERSION%/
            %XILDIR%/Vivado_Lab/%VIVADO_VERSION%/
            %XILDIR%/SDK/%VIVADO_VERSION%/
            Example directory: c:/Xilinx/Vivado/2015.4/
            Attention: Scripts are supported only with predefined Vivado Version!
        b. Set the correct module part-number:
            @set PARTNUMBER=x
            You found the available Module Numbers in <design_name>/board_files/<board_series>_board_files.csv
        c. Set Application name (for programming with batch-files only):
            @set SWAPP=NA
            NA (No Software Project) used *.bit or *.mcs from <design_name>/prebuilt/hardware/<board_file_shortname>
           <app_name> (Software Project) used *.bit or *.mcs or *.bin from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>
  • Create all prebuilt files in one step:
    2. Run “design_run_project_batchmode.cmd
  • (optional to Step 2) Create all prebuilt files in single steps:
    3. Run “vivado_create_project_guimode.cmd”:
        A Vivado Project will be create and open  in ./vivado
    4. Type “TE::hw_build_design” on Vivado TCL-Console:
        Run Synthese, Implement and create Bitfile and optional MCSfile
    5. Type “TE::sw_run_hsi” on Vivado TCL-Console:
        Create all Software Applications from <design_name>/sw_lib/apps_list.csv
    6. (optional to Step 5) Type “TE::sw_run_sdk” on Vivado TCL-Console:
        Create a SDK Project in <design_name>/workspace/sdk
        Include Hardwaredefinition, Bitfile annd Hardware-Definition-File, Bit-file and local Software-libraries from  <design_name>/sw_lib/sw_apps
  • Programming FPGA or Flash Memory with prebuilt Files:
    7. Connect your Hardware-Modul with PC via JTAG.
    With Batch-file:
    8. (optional) Zynq-Devices Flash Programming (*.bin):
        Run “program_flash_binfile.cmd
    9. (optional) FPGA-Device Flash Programming (*.mcs):
        Run “program_flash_mcsfile.cmd
    10. (optional) FPGA-Device Programming (*.bit):
          Run “program_fpga_bitfile.cmd
    With Vivado/Labtools TCL-Console:
    11. Run “vivado_open_existing_project_guimode.cmd” or “labtools_open_project_guimode.cmd” to open Vivado  or LabTools
    12. (optional) Zynq-Devices Flash Programming (*.bin):
          Type “TE::pr_program_flash_binfile -swap <app_name>” on Vivado TCL-Console
          Used *.bin from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>
    13. (optional) FPGA-Device Flash Programming (*.mcs):
          Type “TE:: pr_program_flash_mcsfile -swap <app_name>” on Vivado TCL-Console
          Used *.mcs from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>
    14. (optional) FPGA-Device Programming (*.bit):
          Type “TE:: pr_program_jtag_bitfile -swap <app_name>” on Vivado TCL-Console
          Used *.bit from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>

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  • Variant 1 (recommended):
    • Typ function on Vivado TCL Console, ex.: TE::help
    • TE::help
      • Show all predefined TE-Script functions.
    • TE:<functionname> -help 
      • Show short description of this function.
      • Attention: If -help argument is set, all other args will be ignored. 
  • Variant 2:
    • Create your own function Button on the Vivado GUI:
      • Tools → Customize Commands → Customize Commands...
      • Push +
      • Type Name ex.: Run SDK
      • Press Enter
      • Select Run command and insert function:
        • Variante 1 (no Vivado request window for args):
          • insert function and used args, ex.: TE::sw_program_zynq -swapp hello_world
        • Variant 2 (Vivado request window for args):
          • insert function, ex.:TE::sw_program_zynq
          • Press Define Args...
          • For every arg:
            • Push (plus)
            • Typ Name, Comment, Default Value and set optional
            • Press Enter
            • Example for args:
              • Push (plus)
              • Index, Key Name, -swapp, (tick)
              • Push (plus)
              • Appname, Arg, hello_world, (tick)
               
      • Press Enter
      • A new Button is shown on the Vivado Gui.

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  • To generate predefinde software from libraries, run "TE::sw_run_hsi" on Vivado TCL-Console
  • All programs in in <design_name>/sw_lib/apps_list.csv are generated automaticly
  • Supported are local application libaries from <design_name>/sw_lib/sw_apps or the most Xilinx SDK Applications found in %XILDIR%/SDK/%VIVADO_VERSION%/data/embeddedsw/lib/sw_app

 

 


SDK: Create user software project

  • To start SDK project, run "TE::sw_run_sdk" on Vivado TCL-Console
    Include Hardware-Definition-File, Bit-file and local Software-libraries from  <design_name>/sw_lib/sw_apps
  • To use Hardware-Definition-File, Bit-file from prebuilt folder without building the vivado hardware project, run "sdk_create_prebuilt_project_guimode.cmd" or type  "TE::sw_run_sdk -prebuilt_hdf <board_number>" on Vivado-TCL-Console
  •  To open an existing SDK-project without  update HDF-Data type  "TE::sw_run_sdk -open_only" on Vivado-TCL-Console

Checklist / Troubleshoot

  1. Are you using exactly the same Vivado version? If not then the scripts will not work, no need to try.
  2. Ary you using Vivado in Windows PC? Vivado works in Linux also, but the scripts are tested on Windows only.
  3. Is you PC OS Installation English? Vivado may work on national versions also, but there have been known problems.
  4. Are space character on the project path? Somtimes TCL-Scripts can't handle this correctly. Remove spaces from project path.
  5. Did you have the newest reference design build version? Maybe it's only a bug from a older version.
  6. Check <design_name>/v_log/vivado.log? If no logfile exist, wrong xilinx paths are set in design_basic_settings.cmd
  7. If nothing helps, send a mail to trenz support (support(at)trenz-electronic.de) with subject line "[TE-Reference Designs] ",  the complete zip-name from your reference design and the last log file (<design_name>/v_log/vivado.log)

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