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Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | Others | Notes |
---|---|---|---|---|---|---|
es1 | REV02, REV03 | 2GB | 64MB | Xilinx has stopped ES1 support with 2018.2, please use 2017.4 reference design | ||
TE0808-ES2 | es2_sk | REV03, REV04 | 2GB | 64MB | ||
TE0808-2ES2 | 2es2_sk | REV03, REV04 | 2GB | 64MB | ||
TE0808-04-09EG-1EA | 9eg_1ea_sk | REV04 | 2GB | 64MB | ||
TE0808-04-09EG-1EB | 9eg_1eb_sk | REV04 | 4GB | 64MB | ||
TE0808-04-09EG-1ED | 9eg_1eb_sk | REV04 | 4GB | 64MB | 1,0 mm connector | |
TE0808-04-09EG-1EE | 9eg_1eb_sk | REV04 | 4GB | 128MB | ||
TE0808-04-09EG-1EL | 9eg_1eb_sk | REV04 | 4GB | 128MB | 1,0 mm connector | |
TE0808-04-09EG-2IB | 9eg_2ib_sk | REV04 | 4GB | 64MB | ||
TE0808-04-09EG-2IE | 9eg_2ib_sk | REV04 | 4GB | 128MB | ||
TE0808-04-06EG-1EE | 6eg_1ee_sk | REV04 | 4GB | 128MB | ||
TE0808-04-06EG-1E3 | 6eg_1ee_sk | REV04 | 4GB | 128MB | 1,0 mm connector | |
TE0808-04-15EG-1EB | 15eg_1eb_sk | REV04 | 4GB | 64MB | ||
TE0808-04-15EG-1EE | 15eg_1eb_sk | REV04 | 4GB | 128MB |
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Code Block | ||||
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#System Controller IP
#LED_HD SC0 J3:31
#LED_XMOD SC17 J3:48
#CAN RX SC19 J3:52 B47_L2_P in
#CAN TX SC18 J3:50 B47_L2_N out
#CAN S SC16 J3:46 B47_L3_N out
set_property PACKAGE_PIN J14 [get_ports BASE_sc0]
set_property PACKAGE_PIN G13 [get_ports BASE_sc5]
set_property PACKAGE_PIN J15 [get_ports BASE_sc6]
set_property PACKAGE_PIN K15 [get_ports BASE_sc7]
set_property PACKAGE_PIN A15 [get_ports BASE_sc10_io]
set_property PACKAGE_PIN B15 [get_ports BASE_sc11]
set_property PACKAGE_PIN C13 [get_ports BASE_sc12]
set_property PACKAGE_PIN C14 [get_ports BASE_sc13]
set_property PACKAGE_PIN E13 [get_ports BASE_sc14]
set_property PACKAGE_PIN E14 [get_ports BASE_sc15]
set_property PACKAGE_PIN A13 [get_ports BASE_sc16]
set_property PACKAGE_PIN B13 [get_ports BASE_sc17]
set_property PACKAGE_PIN A14 [get_ports BASE_sc18]
set_property PACKAGE_PIN B14 [get_ports BASE_sc19]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc0]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc5]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc6]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc7]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc10_io]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc11]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc12]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc13]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc14]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc15]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc16]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc17]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc18]
set_property IOSTANDARD LVCMOS18 [get_ports BASE_sc19]
# PLL
#set_property PACKAGE_PIN AH6 [get_ports {si570_clk_p[0]}]
#set_property IOSTANDARD LVDS [get_ports {si570_clk_p[0]}]
#set_property IOSTANDARD LVDS [get_ports {si570_clk_n[0]}]
# Clocks
#set_property PACKAGE_PIN J8 [get_ports {B229_CLK1_clk_p[0]}]
#set_property PACKAGE_PIN F25 [get_ports {B128_CLK0_clk_p[0]}]
# SFP
#set_property PACKAGE_PIN G8 [get_ports {B230_CLK0_clk_p}]
# B230_RX3_P
#set_property PACKAGE_PIN A4 [get_ports {SFP1_rxp}]
# B230_TX3_P
#set_property PACKAGE_PIN A8 [get_ports {SFP1_txp}]
# B230_RX2_P
#set_property PACKAGE_PIN B2 [get_ports {SFP2_rxp}]
# B230_TX2_P
#set_property PACKAGE_PIN B6 [get_ports {SFP2_txp}]
# Audio Codec
#LRCLK J3:49 B47_L9_N
#BCLK J3:51 B47_L9_P
#DAC_SDATA J3:53 B47_L7_N
#ADC_SDATA J3:55 B47_L7_P
set_property PACKAGE_PIN G14 [get_ports LRCLK ]
set_property PACKAGE_PIN G15 [get_ports BCLK ]
set_property PACKAGE_PIN E15 [get_ports DAC_SDATA ]
set_property PACKAGE_PIN F15 [get_ports ADC_SDATA ]
set_property IOSTANDARD LVCMOS18 [get_ports LRCLK ]
set_property IOSTANDARD LVCMOS18 [get_ports BCLK ]
set_property IOSTANDARD LVCMOS18 [get_ports DAC_SDATA ]
set_property IOSTANDARD LVCMOS18 [get_ports ADC_SDATA ] |
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Date | Document Revision | Authors | Description | ||||||||||||||||||||||
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v.21 | John Hartfiel |
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v.19 | John Hartfiel |
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v.18 | John Hartfiel |
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2018-02-08 | v.16 | John Hartfiel |
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2018-01-29 | v.10 | John Hartfiel |
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2018-01-18 | v.8 | John Hartfiel |
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2018-01-17 | v.7 | John Hartfiel |
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2018-01-15 | v.4 | John Hartfiel |
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2017-12-20 | v.2 | John Hartfiel |
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All |
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