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Board Part Carrier Extension
Board Part Carrier Extension is a TCL-Script and is used with TE-Scripts only. It contains additional settings of PS-System for special carrier-board.
Use Reference Designs or Vivado TCL-Console(TE-Script extensions, see Initialise TE-scripts on Vivado/LabTools): TE::hw_blockdesign_create_bd -help to create PS with full settings. Or source the TCL file manually direct after "Run Block Automation"
Board Part CSV Description
Board Part csv file is used for TE-Scripts only.
| Name | Description | Value |
|---|---|---|
| ID | ID to identify the board variant of the module series, used in TE-Scripts | Number, should be unique in csv list |
| PRODID | Product ID, currently not used in TE-Scripts | Product Name |
| PARTNAME | FPGA Part Name, used in Vivado and TE-Scripts | Part Name, which is available in Vivado, ex. xc7z045ffg900-2 |
| BOARDNAME | Board Part Name, used in Vivado and TE-Scripts | Board Part Name or "NA", which is available in Vivado, NA is not defined to run without boardpart, ex. trenz.biz:te0782-02-45:part0:1.0 |
| SHORTNAME | Subdirectory name, used for multi board projects to get correct sources and save prebuilt data | Name, should be unique in csv list |
| ZYNQFLASHTYP | Flash typ used for programming Zynq-Devices via SDK-Programming Tools (program_flash) | "qspi_single" or "NA", NA is not defined |
| FPGAFLASHTYP | Flash typ used for programming Devices via Vivado/LabTools | "<Flash Name from Vivado>|<SPI Interface>|<Flash Size in MB>" or "NA" , NA is not defined, ex. s25fl256s-3.3v-qspi-x4-single|SPIx4|32 Flash Name is used for programming, SPI Interface and Size in MB is used for *.mcs build. |
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Block Design Conventions
- Only one Block-Design per project is supported
Recommended BD-Names (currently importend for some TE-Scripts):
Name Description zsys Idendify project as Zynq Project with processor system (longer name with *zsys* are supported too) zusys Idendify project as UltraScaleZynq Project with processor system (longer name with *zusys* are supported too) msys Idendify project as Microblaze Project with processor system (longer name with *msys* are supported too) fsys Idendify project as FPGA-fabric Project without processor system (longer name with *fsys* are supported too) - Create Basic Block Design with PS Board-Part Preset and Carrier-Board extended settings (only if subfolder carrier_extension with tcl files is available), use TE::hw_blockdesign_create_bd -help
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To modifiy current board part csv list, make a copy of the original csv and rename with suffix "_mod.csv", ex.TE0782_board_files.csv as TE0782_board_files_mod.csv. Scripts used modified csv instead of the original file.
See See Chapter Board Part Files for more information.
User defined Settings
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Overview
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