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Type or File | Version |
---|---|
Vivado Design Suite | 2015.4 |
Trenz Project Scripts | 2015.4.1012 |
Trenz <board_series>_board_files.csv | 1.2 |
Trenz apps_list.csv | 1.5 |
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File Name | Description |
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clear_project.cmd | !Delete "<design_name>/v_log/", "<design_name>/vivado/", and "<design_name>/workspace/" directory with related documents! |
create_project_firstgui.cmd | Create Project with setting from "start_settings.cmd" and source folders. Vivado GUI will be opened during the process. Delete "<design_name>/v_log/", "<design_name>/vivado/", and "<design_name>/workspace/" directory with related documents before Projekt will created. |
create_project_nogui.cmd | Create Project with setting from "start_settings.cmd" and source folders. Delete "<design_name>/v_log/", "<design_name>/vivado/", and "<design_name>/workspace/" directory with related documents before Projekt will created. |
open_project_gui.cmd | Opens an existing Project "<design_name>/vivado/<design_name>.xpr". Delete old "<design_name>/v_log/" before Projekt will opend. |
program_zynqflash.cmd | (optional) For Zynq Systems only. Programming Flash Memory with specified Boot.bin. (Same as SDK "Program Flash"). Used Boot.bin from prebuilt-Folder. It used the boot.bin from: <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>. Set <board_file_shortname> and <app_name> in "start_settings.cmd". |
create_prebuilt_sdk.cmd | (optional) Create SDK project with hardware definition file from prebuild folder. It used the *.hdf from: <design_name>/prebuilt/hardware/<board_file_shortname>/. Set <board_file_shortname> and <app_name> in "start_settings.cmd". |
run_project_nogui.cmd | Create Project with setting from "start_settings.cmd" and source folders. Build all Vivado hardware and software files if the sources are available. Delete "<design_name>/vivado/", and "<design_name>/workspace/hsi/" directory with related documents before Projekt will created. |
start_settings.cmd | Settings for the other *.cmd files. Following Settings are avaliable:
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vivado_labtools.cmd | Create or open an existing Vivado Lab Tools Project. (some additional TE-TCL function will be usable in future script versions) |
Name | Options | Description (Default Configuration) |
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TE::help | Display currently available functions. Important: Use only displayed functions and no functions from sub-namespaces | |
Hardware Design | ||
TE::hw_blockdesign_export_tcl | [-no_mig_contents] [-mod_tcl] [-svntxt <arg>] [-help] | Export Blockdesign to project folder <design_name>/block_design/ . Old *bd.tcl will be overwritten! |
TE::hw_build_design | [-help] | Run Synthese, Implement, and generate Bitfile, optional MCSfile and some report files |
Software Design | ||
TE::sw_run_hsi | [-run_only] [-prebuilt_hdf <arg>] [-no_bif] [-no_bin] [-clear] [-help] | Copy Hardwarefiles to the prebuild folders <design_name>/prebuilt/..Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -prebuild_hdf <arg> isn't set. Copy the Hardware Defintition file to the working directory:<design_name>/workspace/hsi Run HSI in <design_name>/workspace/hsi for all Programes listed in <design_name>/sw_lib/apps_list.csv If HSI is finished, BIF-GEN and BIN-Gen are running for these Apps in the prepuilt folders <design_name>/prebuilt/... |
TE::sw_run_sdk | [-open_only] [-update_hdf_only] [-prebuilt_hdf <arg>] [-clear\] [-help] | Copy Hardwarefiles to the prebuild folders <design_name>/prebuilt/...Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -prebuild_hdf <arg> isn't set. Copy the Hardware Defintition file to the working directory:<design_name>/workspace/sdk Start SDK GUI in this workspace |
Programming | ||
TE::swpr_program_zynq_binfile | [-no_reboot] [-used_board <arg>] [-swapp <arg>][-available_apps] [-help] | Attention: For Zynq Systems only! Program the Bootbin from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name> to the fpga device. Appname is selected with: -swapp <app_name> After programming device reboot from memory will be done. |
TE::pr_program_jtag_bitfile | [-used_board <arg>] | Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -used_board <arg> isn't set. Programming FPGA with Bitfile from <design_name>/prebuilt/hardware/<board_file_shortname> to the fpga device. |
Utilities | ||
TE::util_zip_project | [-save_all] [-remove_prebuilt] [-manual_filename <arg>] [-help] | Make a Backup from your Project in <design_name>/backup/ Zip-Program Variable must be set in start_settings.cmd. Currently only 7-Zip is supported. |
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