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File or Directory	Type	Description
<design_name>	base directory	Base directory with predefined batch files (*.cmd) to generate or open VIVADO-Project
<design_name>/block_design/	source	Script to generate Block Design in Vivado (_bd.tcl). (optional) Some board part designs used subfolder <board_file_shortname> with Board Part specific Block Design (_bd.tcl).
<design_name>/board_files/	source	Local board part files repository and a list of available board part files (<board_series>_board_files.csv)
<design_name>/constraints/	source	Project constrains (.xdc). Some board part designs used subfolder <board_file_shortname> with additional constrains (.xdc)
<design_name>/doc/	source	Documentation
<design_name>/ip_lib/	source	Local Vivado IP repository
<design_name>/misc/	source	(Optional) Directory with additional sources
<design_name>/prebuilt/boot_images/	prebuilt	Directory with prebuilt boot images (.bin) and configuration files (.bif) for zynq and configured hardware files (.bit and .mcs) for micoblaze included in subfolderssub-folders: default or <board_file_shortname>/<app_name>
<design_name>/prebuilt/hardware/	prebuilt	Directory with prebuilt hardware sources (.bit, hdf, *.mcs) and reports included in subfolders: default or <board_file_shortname>
<design_name>/prebuilt/software/	prebuilt	(Optional) Directory with prebuilt software sources (*.elf) included in subfolders: default or <board_file_shortname>/<app_name>
<design_name>/prebuilt/os/	prebuilt	(Optional) Directory with predefined OS images included in subfolders <os_name>/<board_file_shortname> or <os_name>/default
<design_name>/scripts/	source	TCL scripts to build a project
<design_name>/settings/	source	(Optional) Additional design settings: zip_ignore_list.csv, vivado project settings, SDSOC settings
<design_name>/software/	source	(Optional) Directory with additional software
<design_name>/os/	source	(Optional) Directory with additional os sources in in subfolders <os_name>
<design_name>/sw_lib/	source	(Optional) Directory with local SDK/HSI software IP repository and a list of available software (apps_list.csv)
<design_name>/v_log/	generated	(Temporary directory ) Directory with vivado log files (used only when vivado Vivado is started with predefined command files (*.cmd) from base folder otherwise this logs will be writen into the vivado working directory)
<design_name>/vivado/	work, generated	(Temporary) Working directory where Vivado project is created. Vivado project file is <design_name>.xpr
<design_name>/vivado_lab/	work, generated	(Optional/Temporary) Working directory where Vivado LabTools is created. LabTools project file is <design_name>.lpr
<design_name>/workspace/hsi	work, generated	(Optional/Temporary) Directory where hsi project is created
<design_name>/workspace/sdk	work, generated	(Optional) Directory where sdk project is created
<design_name>/sdsoc	work, generated	(Optional) Directory where SDSOC project is created
<design_name>/backup/	generated	(Optional) Directory for project backups

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Name	Options	Description (Default Configuration)
TE::help		Display currently available functions. Important: Use only displayed functions and no functions from sub-namespaces
Hardware Design
TE::hw_blockdesign_export_tcl	[-no_mig_contents] [-no_validate] [-mod_tcl] [-svntxt <arg>] [-board_part_only] [-help]	Export Blockdesign Block Design to project folder <design_name>/block_design/ . Old *bd.tcl will be overwritten!
TE::hw_build_design	[-export_prebuilt] [-export_prebuilt_only] [-help]	Run Synthese, Implement, and generate BitfileBit-file, optional MCSfile MCS-file and some report files
Software Design
TE::sw_run_hsi	[-run_only] [-prebuilt_hdf <arg>] [-no_hsi] [-no_bif] [-no_bin] [-no_bitmcs] [-clear] [-help]	Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -prebuild_hdf <arg> isn't set. Copy the Hardware Defintition file to the working directory:<design_name>/workspace/hsi Run HSI in <design_name>/workspace/hsi for all Programes listed in <design_name>/sw_lib/apps_list.csv If HSI is finished, BIF-GEN and BIN-Gen are running for these Apps in the prepuilt folders <design_name>/prebuilt/... You can deactivate different steps with following args : -no_hsi : .elf filesgeneration is disabled -no_bif : .bif files generation is disabled -no_bin : .bin files generation is disabled -no_bitmcs: .bit and *.mcs file (with software design) is disabled
TE::sw_run_sdk	[-open_only] [-update_hdf_only] [-prebuilt_hdf <arg>] [-clear] [-help]	Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -prebuild_hdf <arg> isn't set. Copy the Hardware Defintition file to the working directory:<design_name>/workspace/sdk Start SDK GUI in this workspace
Programming
TE::pr_init_hardware_manager	[-help]	Open Hardwaremanager, autoconnect target device and initialise flash memory with configuration from *_board_files.csv.
TE::pr_program_jtag_bitfile	[-used_board <arg>] [-swapp <arg>] [-available_apps] [-used_basefolder_bitfile] [-help]	Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -used_board <arg> isn't set (Vivado only). Programming Bitfile from <design_name>/prebuilt/hardware/<board_file_shortname> to the fpga device. If "-used_basefolder_bitfile" is set, the Bitfile (.bit) from the base folder (<design_name>) is used instead of the prebuilts. Attention: Take only one Bitfile in the basefolder! (MicroBlaze only) If "-swapp" is set, the Bitfile with .elf configuration is used from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>
TE::pr_program_flash_binfile	[-no_reboot] [-used_board <arg>] [-swapp <arg>] [-available_apps] [-force_hw_manager] [-used_basefolder_binfile] [-help]	Attention: For Zynq Systems only! Program the Bootbin from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name> to the fpga device. Appname is selected with: -swapp <app_name> After programming device reboot from memory will be done. Default SDK Programmer is used, if not available LabTools Programmer is used. If "-used_basefolder_binfile" is set, the Binfile (*.bin) from the base folder (<design_name>) is used instead of the prebuilts. Attention: Take only one Binfile in the basefolder!
TE::pr_program_flash_mcsfile	[-no_reboot] [-used_board <arg>] [-swapp <arg>] [-available_apps] [-used_basefolder_mcsfile] [-help]	Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -used_board <arg> isn't set (Vivado only). Initialise flash memory with configuration from _board_files.csv Programming MCSfile from <design_name>/prebuilt/hardware/<board_file_shortname> to the Flash Device. After programming device reboot from memory will be done. If "-used_basefolder_binfile" is set, the MCSfile (.mcs) from the base folder (<design_name>) is used instead of the prebuilts. Attention: Take only one MCSfile in the basefolder! (MicroBlaze only) If "-swapp" is set, the MCSfile with *.elf configuration is used from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>
Utilities
TE::util_zip_project	[-save_all] [-remove_prebuilt] [-manual_filename <arg>] [-help]	Make a Backup from your Project in <design_name>/backup/ Zip-Program Variable must be set in start_settings.cmd. Currently only 7-Zip is supported.
Beta Test (Advanced usage only!)
TE::ADV::beta_util_sdsoc_project	[-check_only] [-start_sdsoc_only] [-help]	Create SDSOC-Workspace. Currently only on some Reference-Designs available. Run [-check_only] option to check SDSOC ready state.
TE::ADV::beta_hw_remove_board_part	[-permanent] [-help]	Reconfigure Vivado project as project without board part. Generate XDC-File from board part IO definitions and change ip board part properties. No all IPs are supported.
TE::ADV::beta_hw_export_rtl_ip	\[-help\]	Save IPs used on rtl designs as *.xci in <design_name>hdl/xci. If sub folder <board_file_shortname> is defined this will be saved there.

Design Environment: Usage

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Design Environment: Usage