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Type or FileVersion
Vivado Design Suite2017.4
Trenz Project Scripts2017.4.0102
Trenz <board_series>_board_files.csv1.3
Trenz apps_list.csv

2.0

Trenz zip_ignore_list.csv1.0
Trenz mod_bd.csv (not included)1.1

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NameOptionsDescription (Default Configuration)
TE::help Display currently available functions. Important: Use only displayed functions and no functions from sub-namespaces 
Hardware Design
TE::hw_blockdesign_create_bd[-bd_name] [-msys_local_mem] [-msys_ecc] [-msys_cache] [-msys_debug_module] [-msys_axi_periph] [-msys_axi_intc] [-msys_clk] [-help]

Create new Block-Design with initial Setting for PS, for predefined bd_names:
fsys→Fabric Only, msys→Microblaze, zsys→7Series Zynq, zusys→UltraScale+ Zynq

Typ TE::hw_blockdesign_create_bd -help for more information

TE::hw_blockdesign_export_tcl[-no_mig_contents] [-no_validate] [-mod_tcl] [-svntxt <arg>]  [-board_part_only] [-help]Export Block Design to project folder <design_name>/block_design/ . Old *bd.tcl will be overwritten!
TE::hw_build_design\[-disable_synth\] \[-disable_bitgen\] \[-disable_hdf\] \[-disable_mcsgen\] \[-disable_reports\] \[-export_prebuilt\] \[-export_prebuilt_only\] \[-help\]Run Synthese, Implement, and generate Bit-file, optional MCS-file and some report files
Software Design
TE::sw_run_hsi[-run_only] [-prebuilt_hdf <arg>] [-no_hsi] [-no_bif] [-no_bin] [-no_bitmcs] [-clear] [-help]

Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -prebuild_hdf <arg> isn't set.
Copy the Hardware Defintition file to the working directory:<design_name>/workspace/hsi
Run HSI in <design_name>/workspace/hsi for all Programes listed in <design_name>/sw_lib/apps_list.csv
If HSI is finished, BIF-GEN and BIN-Gen are running for these Apps in the prepuilt folders <design_name>/prebuilt/...
You can deactivate different steps with following args :

  • -no_hsi  : *.elf filesgeneration is disabled
  • -no_bif   : *.bif files generation is disabled
  • -no_bin  : *.bin files generation is disabled
  • -no_bitmcs: *.bit and *.mcs file (with software design) is disabled
TE::sw_run_sdk[-open_only] [-update_hdf_only] [-prebuilt_hdf <arg>] [-clear] [-help]

Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -prebuild_hdf <arg> isn't set.
Copy the Hardware Defintition file to the working directory:<design_name>/workspace/sdk
Start SDK GUI in this workspace

Programming
TE::pr_init_hardware_manager[-help]Open Hardwaremanager, autoconnect target device and initialise flash memory with configuration from *_board_files.csv.
TE::pr_program_jtag_bitfile[-used_board <arg>] [-swapp <arg>] [-available_apps] [-used_basefolder_bitfile] [-help]

Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -used_board <arg> isn't set (Vivado only).
Programming Bitfile from <design_name>/prebuilt/hardware/<board_file_shortname> to the fpga device.
If "-used_basefolder_bitfile" is set, the Bitfile (*.bit)  from the base folder (<design_name>) is used instead of the prebuilts. Attention: Take only one Bitfile in the basefolder!

(MicroBlaze only) If "-swapp" is set, the Bitfile with *.elf configuration is used from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>

TE::pr_program_flash_binfile[-no_reboot] [-used_board <arg>] [-swapp <arg>] [-available_apps] [-force_hw_manager] [-used_basefolder_binfile] [-help]

Attention: For Zynq Systems only!
Program the Bootbin from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name> to the fpga device.
Appname is selected with: -swapp <app_name>
After programming device reboot from memory will be done.
Default SDK Programmer is used, if not available LabTools Programmer is used.
If "-used_basefolder_binfile" is set, the Binfile (*.bin)  from the base folder (<design_name>) is used instead of the prebuilts. Attention: Take only one Binfile in the basefolder!

TE::pr_program_flash_mcsfile[-no_reboot] [-used_board <arg>] [-swapp <arg>] [-available_apps] [-used_basefolder_mcsfile] [-help]

Copies current Hardware files and reports from the vivado project to the prebuilt folder, if -used_board <arg> isn't set (Vivado only).
Initialise flash memory with configuration from *_board_files.csv
Programming  MCSfile from <design_name>/prebuilt/hardware/<board_file_shortname> to the Flash Device.
After programming device reboot from memory will be done.
If "-used_basefolder_binfile" is set, the MCSfile (*.mcs)  from the base folder (<design_name>) is used instead of  the prebuilts. Attention: Take only one MCSfile in the basefolder!

(MicroBlaze only) If "-swapp" is set, the MCSfile with *.elf configuration is used from <design_name>/prebuilt/boot_images/<board_file_shortname>/<app_name>

Utilities
TE::util_zip_project[-save_all] [-remove_prebuilt] [-manual_filename <arg>] [-help]

Make a Backup from your Project in <design_name>/backup/

Zip-Program Variable must be set in start_settings.cmd. Currently only 7-Zip is supported.

TE::util_package_length[-help]Export Package IO length information to *.csv on the doc folder
Beta Test (Advanced usage only!)
TE::ADV::beta_util_sdsoc_project[-check_only] [-help]

Create SDSOC-Workspace. Currently only on some Reference-Designs available. Run [-check_only] option to check SDSOC ready state.

TE::ADV::beta_hw_remove_board_part[-permanent] [-help]Reconfigure Vivado project as project without board part. Generate XDC-File from board part IO definitions and change ip board part properties. No all IPs are supported.
TE::ADV::beta_hw_export_rtl_ip\[-help\]Save IPs used on rtl designs as  *.xci in  <design_name>hdl/xci. If sub folder  <board_file_shortname> is defined this will be saved there.

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Every Version of a Board Parts consists of four files:

  • board.xml
  • part0_pins.xml
  • preset.xml
  • picture.jpg or picture.png

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