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Functional Description

JTAG

JTAGEN set carrier board CPLD into the chain for firmware update. In normal mode JTAG is routed directly to Module. Set S3-ENJTAG to OFF to get access to carrier CPLD.

FMC JTAG is currently not enabled.

Power

EN1 is set to logical one .

EN_FMC is set to logical one or is controlled by I2C on I2C Mode.

PG_C2M is set to logical one or is controlled by I2C on I2C Mode.

VADJ on PCB REV06+ S4 control

This mode is only available on PCB Revision 06 or higher.

S4 control will be enabled on power on or Reset (S2-Button), if one of the three S4-DIP switches is set to one.

In this Mode I2C-controll is not selectable and S3-M1 and S3-M2 are available as User-DIP-Switch.

S4-3(VID2)S4-2(VID1)S4-1(VID0)Description
ONONONVADJ: 3.3V
ONONOFFVADJ: 2.5V
ONOFFONVADJ: 1.8V
ONOFFOFFVADJ: 1.5V
OFFONONVADJ: 1.25V
OFFONOFFVADJ: 1.2V
OFFOFFONVADJ: 0.8V
OFFOFFOFFUsed to set VADJ Control to REV05- control after power up sequence

VADJ on PCB REV05- or I2C control

S4 control will be disabled on power on or Reset (S2-Button), if all of the three S4-DIP switches is set to OFF or older PCB revison is used.

S3-M1S3-M2Description
OFFOFFVADJ: 1.8V
OFFONVADJ: 2.5V
ONOFFVADJ: 3.3V
OnONI2C controlled

 

Reset

RESIN (negative Reset) to module, can be set by S2 button.

Boot Mode

Boot mode is set to SD-Boot, when SD-Card is detected.

RGPIO

RGPIO Master is a 32Bit Remote GPIO Interface to talk with FPGA over 3 lanes.

LED

LEDDescription

ULED1

 
ULED2 
ULED3 
ULED4 
ULED5 
ULED6 
ULED7 
ULED8 

 

UART

ToFromDescription
MIO14BDBUS0Module UART0.RX
BDBUS1MIO15Module UART0.TX

 

Appx. A: Change History and Legal Notices

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