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RGPIO Master is a 32Bit Remote GPIO Interface to talk with FPGA over 3 lanes.
RGPIO Pin to FPGA | Value |
---|---|
0 | MIO10 |
1 | MIO11 |
2 | MIO12 |
3 | MIO13 |
4 | MIO14 |
5 | MIO15 |
6 | PX6 |
7 | PX7 |
8 | S1 |
9 | CM0 |
10 | CM1 |
11 | CM2 |
12 | SD_WP |
13 | SD_DETECT |
14 | USB_OC |
15 | POK_FMC |
16 | FMC_PRSNT |
17 | PGOOD |
18 | NOSEQ |
19 | unused |
20 | X6 |
21 | Y6 |
22-23 | unused |
24-27 | reserved |
28-31 | Interface detection |
RGPIO Pin from FPAG | Value |
---|---|
0-7 | LED 1-8 |
8-9 | PHY_LED 1/2 |
10-23 | unused |
24-27 | reserved |
28-31 | Interface detection |
LED | Description |
---|---|
ULED1 | blink when VCCIO(VIOTB/VADJ) is disabled else on when VADJ on PCB REV05- or I2C Control or off when VADJ on PCB REV06+ S4 Control |
ULED2 | I2C control mode when RGPIO Bus is not active else RGPIO Bus Pin 1 |
ULED3 | UART to Module activity when RGPIO Bus is not active else RGPIO Bus Pin 2 |
ULED4 | UART to FTDI activity when RGPIO Bus is not active else RGPIO Bus Pin 3 |
ULED5 | BOOTMODE (on Flash, off SD) when RGPIO Bus is not active else RGPIO Bus Pin 4 |
ULED6 | CM2 when RGPIO Bus is not active else RGPIO Bus Pin 5 |
ULED7 | X6 when RGPIO Bus is not active else RGPIO Bus Pin 6 |
ULED8 | Y6 when RGPIO Bus is not active else RGPIO Bus Pin 7 |
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Older Revisions to REV05
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