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@Guillermo: Hier die JP11 Stecker Pins wo ETH rausgeführt wird
ADC Interface
@Guillermo: Hier die JP1 Stecker Pins wo ADC rausgeführt wird
PWM Interface
@Guillermo: Hier die JP2 Stecker Pins wo PWN rausgeführt wird
Micro USB -JTAG/UART
@Guillermo: Hier kurz erklären das UART JTAG über FTDI möglich ist und Hinweis das JTAG auch auf B2B J2 geht und nur einer JTAG bedienen darf
MIcro SD Socket
@Guillermo: Hier kurz ob direkt an PS angeschlossen oder Levelshifter oder ob die SD push pull oder push push ist
MIO Pins
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The analog inputs of the ADCs are connected to B2B connector JP1.
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anchor | Table_SIP_ADCs |
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title | ADCs pins connection |
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ADC Signal | B2B Connector | Notes |
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ADC0_P ADC0_N | JP1-106..107 | SAR ADC, U1. 3.3V Max. Voltage on any pin. | ADC1_P ADC1_N | JP1-46..47 | SAR ADC, U3. 3.3V Max. Voltage on any pin. | ADC2_P ADC2_N | JP1-109..110 | SAR ADC, U10. 3.3V Max. Voltage on any pin. | ADC3_P ADC3_N | JP1-49..50 | SAR ADC, U15. 3.3V Max. Voltage on any pin. | ADC4_P ADC4_N | JP1-112..113 | SAR ADC, U17. 3.3V Max. Voltage on any pin. | ADC5_P ADC5_N | JP1-52..53 | SAR ADC, U2. 3.3V Max. Voltage on any pin. | ADC6_P ADC6_N | JP1-115..116 | SAR ADC, U4. 3.3V Max. Voltage on any pin. | ADC7_P ADC7_N | JP1-55..56 | SAR ADC, U11. 3.3V Max. Voltage on any pin. | ADC8_P ADC8_N | JP1-118..119 | SAR ADC, U16. 3.3V Max. Voltage on any pin. | ADC9_P ADC9_N | JP1-58..59 | SAR ADC, U19. 3.3V Max. Voltage on any pin. |
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PWM Interface
@Guillermo: Hier die JP2 Stecker Pins wo PWN rausgeführt wird
Micro USB -JTAG/UART
@Guillermo: Hier kurz erklären das UART JTAG über FTDI möglich ist und Hinweis das JTAG auch auf B2B J2 geht und nur einer JTAG bedienen darf
Micro SD Socket
A microSD™ card connector (J2) is connected via U35 (SD/SDIO Multiplexer - Level Translator) to PS (Bank-501). It is a Push-On/Push-Off socket type, and work with a voltage level of 3.3V.
MIO Pins
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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic. Example: MIO Pin | Connected to | B2B | Notes |
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MIO12...14 | SPI_CS , SPI_DQ0... SPI_DQ3 SPI_SCK | J2 | QSPI |
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PS MIO bank 500 signal connections to B2B JP1 connector, and PS MIO bank banks 500/501 signal connections to the microSD™ card J2:interface.
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title | MIOs pins |
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/SD15 | UART_TX_ZYNQ | JP1-70 | 3.3V Voltage level. Also Connected to U36-2. To use this signal from B2B connector, "UART_OB_DISABLE" (JP1-11) must be "High". | 1..6 | SPI-CS , SPI-DQ0... SPI-DQ3 SPI-SCK | - | QSPI Flash, U7 | 11..13 | LED1_R..G..B | - | LED D4 | 14, 15 | 14 | UART_RX_ZYNQ, UART_TX_ZYNQ | JP1 | -71 | 3.3V Voltage level. Also Connected to U36- | 32. To use this signal from B2B connector, "UART_OB_DISABLE" (JP1-11) must be "High | ".40 | SD_CLK | J2-5 | 3.3V Voltage level. Connected via U35 (SD/SDIO Multiplexer - Level Translator) | 41 | SD_CMD | J2-3 | 3.3V Voltage level. Connected via U35 (SD/SDIO Multiplexer - Level Translator) | 42 | SD_DAT0 | J2-7 | 3.3V Voltage level. Connected via U35 (SD/SDIO Multiplexer - Level Translator) | ". | 16..27 | ETH-TXCK, ETH-TXD0..ETH-TXD3, ETH-TXCTL, ETH-RXCK, ETH-RXD0..ETH-RXD3, ETH-RXCTL | - | Gigabit ETH Transceiver, U8 | 28..39 | OTG-DATA0..OTG-DATA7, OTG-DIR, OTG-STP, OTG-NXT, OTG-CLK | - | USB 2.0 ULPI transceiver, U18 | 40..45 | PS_SD_CLK, PS_SD_CMD, PS_SD_DAT0..PS_SD_DAT3 | J2 |
43 | SD_DAT1 | J2-8 | 3.3V Voltage level. Connected to PS via U35 (SD/SDIO Multiplexer - Level Translator) |
44 | SD_DAT2 | J2-1 | 3.3V Voltage level. Connected via U35 (SD/SDIO Multiplexer - Level Translator) | 46, 47 | I2C_SCL, I2C_SDA | - | General Purpose EEPROM, U21 MAC EEPROM, U24 | 51 | PHY-RST | - | Gigabit ETH Transceiver, U8 USB 2.0 ULPI transceiver, U18 | 52, 53 | ETH-MDC, ETH-MDIO | - | Gigabit ETH Transceiver, U8 |
45 | SD_DAT3 | J2-2 | 3.3V Voltage level. Connected via U35 (SD/SDIO Multiplexer - Level Translator)
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Test Points
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you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section. Example: Test Point | Signal | B2B | Notes |
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10 | PWR_PL_OK | J2-120 |
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anchor | Table_OBP_INADC |
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title | ADC Analog interface and pins |
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Designator | Schematic | B2B JP1 pin | Notes |
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U1 | ADC0_P ADC0_N | 106 - 107 | 3.3V Max Voltage on any pin. | U2 | ADC5_P ADC5_N | 52 - 53 | 3.3V Max Voltage on any pin. | U3 | ADC1_P ADC1_N | 46 - 47 | 3.3V Max Voltage on any pin. | U4 | ADC6_P ADC6_N | 115 - 116 | 3.3V Max Voltage on any pin. | U10 | ADC2_P ADC2_N | 109 - 110 | 3.3V Max Voltage on any pin. | U11 | ADC7_P ADC7_N | 55 - 56 | 3.3V Max Voltage on any pin. | U15 | ADC3_P ADC3_N | 49 - 50 | 3.3V Max Voltage on any pin. | U16 | ADC8_P ADC8_N | 118 - 119 | 3.3V Max Voltage on any pin. | U17 | ADC4_P ADC4_N | 112 - 113 | 3.3V Max Voltage on any pin. | U19 | ADC9_P ADC9_N | 58 - 59 | 3.3V Max Voltage on any pin. |
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All the diigital signals are connected to PL Bank 34 as follows:
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