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| Scroll Title |
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| anchor | Table_SIP_JTG |
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| title | JTAG pins connection |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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JTAG Signal | B2B Connector | Notes |
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| TMS | JP2-7 | 3.3V Voltage level. Also Connected to U39 (FTDI) | | TDI | JP2-11 | 3.3V Voltage level. Also Connected to U39 (FTDI) | | TDO | JP2-10 | 3.3V Voltage level. Also Connected to U39 (FTDI) | | TCK | JP2-8 | 3.3V Voltage level. Also Connected to U39 (FTDI) | | VREF_JTAG | JP2-5 | Module Vout |
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UART Interface
The TE0716 provides UART access to the TE0716 SoM through B2B connector JP1. The TE0716 is also provided equipped with a FTDI USB-to-UART adapter connected to the MicroUSB connector J13, but ONLY ONE connection for UART should be used at the time! (please read "Notes" in the following table). The UART interface is connected to the Zynq UART PS (UART 0).
| Scroll Title |
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| anchor | Table_SIP_UART |
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| title | UART pins connection |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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UART Signal | B2B Connector | Notes |
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| UART_TX_ZYNQ | JP1-70 | 3.3V Voltage level. Also Connected to FTDI through U36. To use this signal from B2B connector, "UART_OB_DISABLE" (JP1-11) must be "High". | | UART_RX_ZYNQ | JP1-71 | 3.3V Voltage level. Also Connected to FTDI through U36. To use this signal from B2B connector, "UART_OB_DISABLE" (JP1-11) must be "High". |
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A microSD™ card connector (J2) is connected via U35 (SD/SDIO Multiplexer - Level Translator) to Zynq PS (Bank-501Bank501/SDIO 0). It is a Push-On/Push-Off socket type, and work with a voltage level of 3.3V.
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There are 2x EEPROMs sharing the same I2C bus (I2C interface is connected to the Zynq I2C PS (I2C 0).:
MAC-Address EEPROM
A 2Kbit 24AA025E48 serial EEPROM I2C memory (U24), connected to the BANK501 PSMIOs, contains a globally unique 48-bit node address, which is compatible with EUI-48TM specification. The device is organized as two blocks of 128 x 8-bit memory. One of the blocks, the upper half of the array (80h-FFh), stores the 48-bit node address and is permanently write-protected, while the other block is available for application use.
- Part number: 24AA025E48T-I/OT
- Supply voltage: 1.8V (1.7V - 5.5V).
- FCLK: 100KHz (@VCC=1.8V)
- Temperature: Industrial Range -40°C to +85°C.
General Purpose EEPROM
The TE0716 module has also a 512Kb Serial EEPROM I2C memory (U21).
- Part number: CAT24C512WI-GT3
- Supply voltage: 1.8V (1.8V - 5.5V).
- FCLK: 100KHz/400KHz/1MHz
- Temperature: Industrial Range -40°C to +85°C.
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| Scroll Title |
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| anchor | Table_OBP_ADC |
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| title | ADC interface PL and pins |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Designator | Schematic | PL Pin | Notes |
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| U1 |
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| | U3 |
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| | U10 |
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| | U11 |
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| | U15 |
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| | U16 |
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| | U17 |
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| | U19 |
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Clock Sources
The TE0716 board is equipped with 4x Oscillators, every one with its specific function.
| Scroll Title |
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| anchor | Table_OBP_CLK |
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| title | Oscillators |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Designator | Description | Frequency | Note |
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| U6 | FPGA PS Reference Clock Input | 33.333333 MHz | Industrial Temperature -40°C to +85°C. | | U9 | Ethernet PHY Reference Clock Input | 25MHz | 25.000000 MHz | Industrial Temperature -40°C to +85°C.- | | U14 | Ethernet USB ULPI PHY Reference Clock Input | 52MHz | 52.000000 MHz | Industrial Temperature -40°C to +85°C.- | | U41 | MHz | - |
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Ethernet
| FTDI Reference Clock Input | 12.000000 MHz | Industrial Temperature -40°C to +85°C. |
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Ethernet
The TE0716 is provided the on-board Gigabit Ethernet PHY Marvell Alaska 88E1512 IC (U8). The Ethernet PHY RGMII interface is connected to the Zynq Ethernet PS (Ethernet 0).
- Part number: 88E1512-A0-NNP2I000
- Supply voltage: 1.8V and 3.3V.
- Reference clock: 25.00MHz
- Temperature: Industrial Range -40°C to +85°C.
| Scroll Title |
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| anchor | Table_OBP_ETH |
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| title | Ethernet PHY to Zynq SoC connections |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| U8 Pin | Signal Name | Connected to | Signal Description | Note |
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TX_CLK | ETH-TXCK | MIO16 | RGMII Transmit Clock | - | TXD[0..3] | ETH-TXD0..3 | MIO17..20 | RGMII Transmit Data
| - | TX_CTRL | ETH-TXCTL | MIO21 | RGMII Transmit Control | - | RX_CLK | ETH-RXCK | MIO22 | RGMII Receive Clock | - | RXD[0..3] | ETH-RXD0..3 | MIO23..26 | RGMII Receive Data | - | RX_CTRL | ETH-RXCTL | MIO27 | RGMII Receive Control | - | MDC | ETH-MDC | MIO52 | Management data clock reference | - | MDIO | ETH-MDIO | MIO53 | Management data | - | RESETn | PHY-RST | MIO51, U18 | Hardware reset. Active low. | Shared with U18 (RESETB) USB | MDIP[0..3] MDIN[0..3] | PHY_MDI0..3_P
PHY_MDI0..3_N | JP1 | Media Dependent Interface | - | XTAL_IN | ETH-CLK | U9 | Reference Clock Input | see also Clock Sources section | LED[0..1] | PHY_LED0..1 | FPGA BANK 33 | LED output | - |
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USB3320 is a Hi-Speed USB 2.0 Transceiver that provides a configurable physical layer (PHY) solution with full OTG support. The USB PHY ULPI interface is connected to the Zynq USB PS (USB 0).
- Part number: USB3320C-EZK
- Supply voltage: 1.8V and 3.3V.
- Reference clock: 52.00MHz
- Temperature: Industrial Range -40°C to +85°C.
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Channel B can be used as UART interface routed to the 2-Bit Bus Switch, which routes to the BANK 500 Zynq SoC, when the Output of the Bus Switch is Enable, and is available for other user-specific purposes.
- Part number: USB3320C-EZK
- Supply voltage: 1.8V and 3.3V.
- Reference clock: 52.00MHz
- Temperature: Industrial Range -40°C to +85°C.
| Scroll Title |
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| anchor | Table_OBP_FTDI |
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| title | USB FTDI to Zynq SoC connections |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| U?? Pin | Signal Name | Connected to | Signal Description | Note |
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