Page History

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Products Affected

This change affects all Trenz Electronic TE0807 SoMs: TE0807-03*.

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Impact: DDR timing needs to be considered in customer design. Trenz Reference Design reflects it without changing timing but custom firmware needs to be checked and eventually updated by customer.

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#2 Changed DCDC EN63A0QI (U4) to MPQ8633BGLE-Z and adapted power circuit.

Type: Schematic Change

Reason: EOL of Component.

Impact: None. Increased current output capability. Minor changes in electrical characteristics.

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#3 Changed DCDC TPS82085SIL/MUN3CAD03-SE (U13) to MPM3860GQW-Z and adapted power circuit. Added optional (default: not fitted) pull-up resistor (R77) for signal "PG_VCU".

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Type: Schematic Change

Reason: Increase current capability.

Impact: None. Increased current output capability. Minor changes in electrical characteristics.

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#4 Changed DCDC (U15, U19, U20, U21, U22, U23, U24, U29, U30, U31, U38) from TPS82085SIL/MUN3CAD03-SE to MPM3834CGPA and adapted according circuit.

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Type: Schematic Change

Reason: BOM Optimization.

Impact: None. Minor changes in electrical characteristics.

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#5 Increased voltage from 1.35 V to 1.45 V via voltage divider resistors (R28, R30) and changed voltage rail name accordingly from PL_GT_1V35 to PL_GT_1V45.

Type: Schematic Change

Reason: Improve voltage rail behaviour.

Impact: None.

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#6 Increased voltage from 1.05 V to 1.15 V via voltage divider resistors (R33, R35) and changed voltage rail name accordingly from PL_GT_1V05 to PL_GT_1V15.

Type: Schematic Change

Reason: Improve voltage rail behaviour.

Impact: None.

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#7 Changed PLL (U5) from Si5345A-B to Si5345A-D-GM.

Type: Schematic Change

Reason: Updated to new PLL revision.

Impact: None. Minor changes in electrical characteristics. For more information take a look at AN1006-Si534x-8x-RevB-RevD-Differences.

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#8 Changed inverted buffer SN74LVC1G06DRL to not inverted buffer SN74LVC1G07DRL (U16A/U16B).

Type: Schematic Change

Reason: Harmonize logic with other module series.

Impact: Logic state change for LED D1.

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#9 Added diode (D3) between U41 pin 3 net MR and voltage

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rail LP_DCDC.

Type: Schematic Change

Reason: Protect manual reset pin.

Impact: None.

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#10 Improved voltage rail VTT layout and added decoupling capacitor (C213 ... C215).

Type: Schematic Change

Reason: VTT layout and decoupling improvement.

Impact:Improved VTT voltage rail reliabililty.

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#11 Replaced DDR4 memory chips to use bigger chip sizes.

Type: PCB Change

Reason: Increase DDR4 usage flexibility.

Impact: None. More DDR4 Chips are usable.

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#12 Enabled DDR4 test usage via connecting DDR4-TEN signals together for DDR4 memory (U2, U3, U9, U12) and pulling them down via 499 Ohm resistor (R103). Added testpoint (TP3) for signal DDR4-TEN.

Type: Schematic Change

Reason: Enable DDR4 test improvement.

Impact: None.

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#13 Added option to use remote senses for DCDC (U29, U30, U31) via resistor (R13, R90, R106) (Default: not fitted).

Type: Schematic Change

Reason: Remote sense option.

Impact: None.

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#14 Added additional decoupling capacitors C136, C149...C152, C155, C156, C201...C212, C216...C234.

Type: Schematic Change

Reason: Improve decoupling.

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Reason: Improved SPI interface usage with different flashs.

Impact: None.

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#17 Added pull-up resistor (R107) (default: not fitted) and pull-down resistor (R109) (default: fitted) for signal "POR_OVERRIDE" (U1).

Type: Schematic Change

Reason: Enable POR Override feature.

Impact: None.

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#18 Changed 10 nF capacitor (C112) from 16 V, 0402 to 10 V, 0201.

Type: Schematic Change

Reason: BOM Optimization.

Impact: None.

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#19 Changed 100 nF capacitor (C37, C79, C95, C96, C130, C131, C133) from 6.3 V, X5R, 0201 to 50 V, X7R, 0402.

Type: Schematic Change

Reason: BOM Optimization.

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Reason: BOM Optimization.

Impact: None.

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#21 Changed 10 µF capacitor (C65 ... C67) from 16 V, 0603 to 6.3 V, 0401.

Type: Schematic Change

Reason: BOM Optimization.

Impact: None.

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#22 Changed capacitor (C129, C132, C140 ... C148, C153) from 10 µF, 16 V

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to 22 µF, 10 V.

Type: Schematic Change

Reason: BOM Optimization.

Impact: None.

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#23 Changed capacitor (C73, C75) from 100 µF, 6.3 V, 1206 to 22 µF, 10 V, 0603.

Type: Schematic Change

Reason: BOM Optimization.

Impact: None.

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#24 Changed 100 µF capacitor (C29 ... C32, C35, C36, C43, C46, C52, C166 ... C169) from 6.3 V, 1206 to 4 V, 0805.

Type: Schematic Change

Reason: BOM Optimization.

Impact: None.

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#25 Changed 47 µF capacitor (C22 ... C28, C33, C34, C68 ... C70, C74, C76 ... C78, C80 .... C88, C110, C154, C198, C199, C200, C205) from 0805 to 0603.

Type: Schematic Change

Reason: BOM Optimization.

Impact: None.

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#26 Changed ferrid bead (L1 ... L5, L7) from BKP0603HS121-T to MPZ0603S121HT000.

Type: BOM Change

Reason:EOL of component.

Impact: None.

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#27 Changed resistor (R41, R58) from 2 kOhm to 2.49 kOhm.

Type: Schematic Change

Reason: BOM optimization.

Impact: None.

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#28 Changed resistor (R74) from 4.7 kOhm, 0201 to 10 kOhm, 0402.

Type: Schematic Change

Reason: BOM optimization.

Impact: None.

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#29 Added testpoints (TP4, TP6 ... TP9, TP11, TP13, TP14, TP19 ... TP22, TP34 ... TP67).

Type: Schematic Change

Reason: Improve voltage measuring possibilities.

Impact: None.

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#30 Added Trenz address on PCB.

Type: PCB Change

Reason: Improve product identification.

Impact: None.

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#31 Added CE-, UKCA-, RoHS-, and WEEE-logo.

Type: PCB Change

Reason: Improve product classification.

Impact: None.

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#32 Updated components from library.

Type: Schematic Change

Reason: Use latest component data.

Impact: None.

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#33 Changed signal trace lengths.

Type: PCB Change

Reason: Result of changes above.

Impact: Changed trace length have to be taken into account in existing designs. The trace length for new revision will be available in TE080x series pinout generator. Please check if change in trace length still matches your requirements. Adaption of carrier may be necessary.

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#34 Added system and power diagram. Updated legal notices and revision history. Updated page count and order. 

Type: Documentation Update

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