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Scroll Title
anchorTable_SIP_JTG
titleJTAG pins connection

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JTAG Signal

B2B Connector

Notes
TMSJP2-7Also Connected to U39 (FTDI)
TDIJP2-11Also Connected to U39 (FTDI)
TDOJP2-10Also Connected to U39 (FTDI)
TCK

JP2-8

Also Connected to U39 (FTDI)

VREF_JTAGJP2-5Module Vout


MIO Pins

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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

MIO PinConnected toB2BNotes
MIO12...14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

J2QSPI


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Scroll Title
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titleTest Points Information

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Test PointSignalConnected toNotes
TP1+1.0V

U37, DC-DC Converter

PL-VCCINT
TP2ADC_VAAU37U38, LDO Regulator
ADC_VAA Analog supply/reference, (3.3V)
TP3+1.5VU43, DC-DC Converter-
TP4+1.8VU45, DC-DC Converter-
TP5VTTU47, 3A Sink/Source DDR Termination Regulator(VTT/VTTREF, 0.75V), U47 (Bottom)
TP6VTTREFU47, 3A Sink/Source DDR Termination Regulator(0.75V)TP6VTTREF-
TP7+5.0VJP1-(1,2,3)
JP2-(1,2,3)		Main Digital Power Input
TP8+3.3VU46, DC-DC Converter-
TP9+5.0V_VAAJP1-(43,44)Main Analog Low Power Input
TP10+3.3V_ADC-U23, LDO RegulatorADC's Digital I/O supply
TP11GND--
TP12GND--
TP13SPI-DQ3/M0MIO_5Remove SD card and short with TP14 for JTAG only mode
TP14GND--


On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs

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Scroll Title
anchorTable_OBP
titleOn board peripherals

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Chip/InterfaceDesignatorNotes
Quad SPI FlashU7-













Quad SPI Flash Memory

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Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.

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