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  • SoC/FPGA
    • Package: CLG484
    • Device: Xilinx Z-7020
    • Speed: -1 *
    • Temperature: C grade *.
  • RAM/Storage
    • Low Power DDR3 SDRAM on PS
      • Data width: 32bit
      • Size: def. 1GB *
      • Speed: 1600 Mbps **
    • QSPI boot Flash
      • Data width: 4bit
      • size: 32MB *
    • MAC address serial EEPROM with EUI-48™ node identity (Microchip 24AA025E48).
    • 512Kb user MAC address serial EEPROM.
  • On Board
    • 10x 12-Bit Low Power SAR ADCs up to 2 MSPS (NCD98011).
    • Low Power Oscillators.
    • Gigabit Ethernet PHY transceiver (Marvell Alaska 88E1512).
    • Hi-speed USB2 ULPI transceiver with full OTG support (Microchip USB3320C).
    • Single chip High Speed USB 2.0 to UART/JTAG Interface (Xilinx License included) (FTDI FT2232H).
    • 2xUser RGB LEDs (Green), LED FPGA DONE (Green).
    • 2 x Tactile Switches (User), 1 x Tactile Switche (Reset).
  • Interface
    • 120 x HR PL I/Os (3 banks).
    • 2x PS MIOs (shared with UART TX/RX ZYNQ-FTDI).
    • 1 Gbps RGMII Ethernet interface.
    • High Speed USB2 ULPI with full OTG support.
    • High Speed USB 2.0 to UART/JTAG Interface, including microUSB-B connector.
    • Card Connector microSD™.
    • JTAG.
  • Power
    • On-board high-efficiency DC-DC converters for all voltages used.
  • Dimension
    • 65 x 45 mm
  • Notes
    • * depends on assembly version
    • ** depends on used Zynq and DDR3 combination

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  1. Xilinx Zynq XC7Z SoC, U5 (Top)
  2. 4Gbit DDR3/L SDRAM, U13 (Top)
  3. 4Gbit DDR3/L SDRAM, U12 (Top)
  4. 32MByte Quad SPI Flash memory, U7 (Top)
  5. 2Kbit MAC address serial EEPROM with EUI-48TM node identity, U24 (Top)
  6. 512Kb Serial EEPROM memory, U21 (Top)
  7. 10x 12-Bit Low Power SAR ADCs, U1..U4, U10, U11, U15..U17, U19 (Top)
  8. High-speed USB 2.0 ULPI transceiver, U18 (Top)
  9. Single chip USB Interface 2.0 to UART / JTAG, U39 (Top)
  10. MicroUSB-B connector, J13 (Top)
  11. Low-power oscillator @ 12.000000MHz (OSCI-FTDI), U41 (Top)
  12. Low-power oscillator @ 25.000000MHz (ETH-CLK), U9 (Top)
  13. LED FPGA DONE (Green) 13 d3 (Top)
  14. User RGB LED 1 D4 (Top)
  15. User RGB LED 2 D5 (Top)
  16. Tactile Switch (User), S1 (Top)
  17. Tactile Switch (User), S2 (Top)
  18. Tactile Switch (Reset), S3 (Top)
  19. 5A Synchronous Buck DC-DC Converter (1V), U37 (Top)
  20. 2A Synchronous Buck DC-DC Converter (3.3V), U46 (Top)
  21. 2A Synchronous Buck DC-DC Converter (1.8V), U45 (Top)
  22. 2A Synchronous Buck DC-DC Converter (1.5V), U43 (Top)
  23. 250mA Ultra-Low Noise LDO Regulator (3.3V_ADC Digital I/O supply), U23 (Top)
  24. 250mA Ultra-Low Noise LDO Regulator (ADC_VAA Analog supply/reference, 3.3V), U38 (Top)
  25. Gigabit Ethernet PHY transceiver, U8 (Bottom)
  26. Low-power oscillator @ 33.333333MHz (PS-CLK), U6 (Bottom)
  27. 3A Sink/Source DDR Termination Regulator (VTT/VTTREF, 0.75V), U47 (Bottom)
  28. Card Connector microSD™, J2 (Bottom)
  29. 2x60 positions high speed/density plug connector, JP1 (Bottom)
  30. 2x60 positions high speed/density plug connector, JP2 (Bottom)


Initial Delivery State

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