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titleADCs pins connection

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ADC Signal

B2B Connector

Notes
ADC0_P
ADC0_N		JP1-106..107

SAR ADC, U1.
3.3V Max. Voltage on any pin.

ADC1_P
ADC1_N		JP1-46..47

SAR ADC, U3.
3.3V Max. Voltage on any pin.

ADC2_P
ADC2_N		JP1-109..110

SAR ADC, U10.
3.3V Max. Voltage on any pin.

ADC3_P
ADC3_N		JP1-49..50

SAR ADC, U15.
3.3V Max. Voltage on any pin.

ADC4_P
ADC4_N		JP1-112..113

SAR ADC, U17.
3.3V Max. Voltage on any pin.

ADC5_P
ADC5_N		JP1-52..53

SAR ADC, U2.
3.3V Max. Voltage on any pin.

ADC6_P
ADC6_N		JP1-115..116

SAR ADC, U4.
3.3V Max. Voltage on any pin.

ADC7_P
ADC7_N		JP1-55..56

SAR ADC, U11.
3.3V Max. Voltage on any pin.

ADC8_P
ADC8_N		JP1-118..119

SAR ADC, U16.
3.3V Max. Voltage on any pin.

ADC9_P
ADC9_N		JP1-58..59

SAR ADC, U19.
3.3V Max. Voltage on any pin.


PWM Interface

@Guillermo: Hier die JP2 Stecker Pins  wo PWN rausgeführt wird 

Micro USB -JTAG/UART

A microUSB-B connector (J13) is connected to the FTDI. It provides the ability to communicate to the PL FPGA via JTAG, as well as to the PS UART (UART 0).

Caution: because the TE0716 also provides UART and JTAG access to the FPGA through B2B connectors JP1 and JP2 respectively, ONLY ONE connection for UART, and ONLY ONE connection for JTAG, should be used at the time! (please read "UART Interface" and "JTAG Interface" above in the "Board to Board (B2B)" Section).

Micro SD Socket

...

The PWM signals are connected to B2B connector JP2. All this digital signals are connected to PL Bank 33 (except for PWM_6_H  and PWM_6_L which are connected to PL Bank 13). This signals could be also used as normal single ended I/Os.

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titlePWMs pins connection

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PWM Signal

B2B Connector

Notes
PWM_0_H         JP2-103 3.3V Max. Voltage on any pin.
PWM_0_L         JP2-1043.3V Max. Voltage on any pin.
PWM_1_H         JP2433.3V Max. Voltage on any pin.
PWM_1_L         JP2-443.3V Max. Voltage on any pin.
PWM_10_H        JP2-1183.3V Max. Voltage on any pin.
PWM_10_L        JP2-1193.3V Max. Voltage on any pin.
PWM_11_H        JP2-583.3V Max. Voltage on any pin.
PWM_11_L        JP2-593.3V Max. Voltage on any pin.
PWM_2_H         JP2-1063.3V Max. Voltage on any pin.
PWM_2_L         JP2-1073.3V Max. Voltage on any pin.
PWM_3_H         JP2-463.3V Max. Voltage on any pin.
PWM_3_L         JP2-473.3V Max. Voltage on any pin.
PWM_4_H         JP2-1093.3V Max. Voltage on any pin.
PWM_4_L         JP2-1103.3V Max. Voltage on any pin.
PWM_5_H         JP2-493.3V Max. Voltage on any pin.
PWM_5_L         JP2-503.3V Max. Voltage on any pin.
PWM_6_H         JP2-1123.3V Max. Voltage on any pin.
PWM_6_L         JP2-113 3.3V Max. Voltage on any pin.
PWM_7_H         JP2-52 3.3V Max. Voltage on any pin.
PWM_7_L         JP2-533.3V Max. Voltage on any pin.
PWM_8_H         JP2-1153.3V Max. Voltage on any pin.
PWM_8_L         JP2-1163.3V Max. Voltage on any pin.
PWM_9_H         JP2-553.3V Max. Voltage on any pin.
PWM_9_L         JP2-563.3V Max. Voltage on any pin.


Micro USB -JTAG/UART

A microUSB-B connector (J13) is connected to the FTDI. It provides the ability to communicate to the PL FPGA via JTAG, as well as to the PS UART (UART 0).

Caution: because the TE0716 also provides UART and JTAG access to the FPGA through B2B connectors JP1 and JP2 respectively, ONLY ONE connection for UART, and ONLY ONE connection for JTAG, should be used at the time! (please read "UART Interface" and "JTAG Interface" above in the "Board to Board (B2B)" Section).

Micro SD Socket

A microSD™ card connector (J2) is connected via U35 (SD/SDIO Multiplexer - Level Translator) to Zynq PS (Bank501/SDIO 0). It is a Push-On/Push-Off socket type, and work with a voltage level of 3.3V.

MIO Pins

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hiddentrue
idComments

you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

MIO PinConnected toB2BNotes
MIO12...14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

J2QSPI


PS MIO banks 500/501 signal connections to interface.

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titleMIOs pins

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MIO PinConnected toB2BNotes
1..6

SPI-CS , SPI-DQ0... SPI-DQ3

SPI-SCK

-QSPI Flash, U7
11..13LED1_R..G..B-LED D4
14, 15UART_RX_ZYNQ, UART_TX_ZYNQJP13.3V Voltage level. Also Connected to U36-2. To use this signal from B2B connector, "UART_OB_DISABLE" (JP1-11) must be "High".
16..27ETH-TXCK, ETH-TXD0..ETH-TXD3, ETH-TXCTL, ETH-RXCK, ETH-RXD0..ETH-RXD3, ETH-RXCTL-Gigabit ETH Transceiver, U8
28..39OTG-DATA0..OTG-DATA7, OTG-DIR, OTG-STP, OTG-NXT, OTG-CLK-USB 2.0 ULPI transceiver, U18
40..45PS_SD_CLK, PS_SD_CMD, PS_SD_DAT0..PS_SD_DAT3J23.3V Voltage level. Connected to PS via U35 (SD/SDIO Multiplexer - Level Translator)

...

46, 47I2C_SCL, I2C_SDA-General Purpose EEPROM, U21
MAC EEPROM, U24
51PHY-RST-Gigabit ETH Transceiver, U8
USB 2.0 ULPI transceiver, U18
52, 53ETH-MDC, ETH-MDIO-Gigabit ETH Transceiver, U8


Test Points

...

Page properties
hiddentrue
idComments

you must fill the table below with group of MIOs Test Point which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematicindicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.

Example:

Test PointSignalMIO PinConnected toB2BNotes
MIO12...14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

J2QSPI

...

10PWR_PL_OKJ2-120



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titleMIOs pinsTest Points Information

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Test Point
MIO Pin
SignalConnected to
B2B
Notes
Notes
TP1+1.
.6

SPI-CS , SPI-DQ0... SPI-DQ3

SPI-SCK

-QSPI Flash, U7
11..13LED1_R..G..B-LED D4
14, 15UART_RX_ZYNQ, UART_TX_ZYNQJP13.3V Voltage level. Also Connected to U36-2. To use this signal from B2B connector, "UART_OB_DISABLE" (JP1-11) must be "High".
16..27ETH-TXCK, ETH-TXD0..ETH-TXD3, ETH-TXCTL, ETH-RXCK, ETH-RXD0..ETH-RXD3, ETH-RXCTL-Gigabit ETH Transceiver, U8
28..39OTG-DATA0..OTG-DATA7, OTG-DIR, OTG-STP, OTG-NXT, OTG-CLK-USB 2.0 ULPI transceiver, U18
40..45PS_SD_CLK, PS_SD_CMD, PS_SD_DAT0..PS_SD_DAT3J23.3V Voltage level. Connected to PS via U35 (SD/SDIO Multiplexer - Level Translator)
46, 47I2C_SCL, I2C_SDA-General Purpose EEPROM, U21
MAC EEPROM, U24
51PHY-RST-Gigabit ETH Transceiver, U8
USB 2.0 ULPI transceiver, U18
52, 53ETH-MDC, ETH-MDIO-Gigabit ETH Transceiver, U8

Test Points

0V

U37, DC-DC Converter

PL-VCCINT
TP2ADC_VAAU38, LDO Regulator
ADC_VAA Analog supply/reference, (3.3V)
TP3+1.5VU43, DC-DC Converter-
TP4+1.8VU45, DC-DC Converter-
TP5VTTU47, DDR Termination Regulator(0.75V)
TP6VTTREFU47, DDR Termination Regulator(0.75V)
TP7+5.0VJP1-(1,2,3)
JP2-(1,2,3)		Main Digital Power Input
TP8+3.3VU46, DC-DC Converter-
TP9+5.0V_VAAJP1-(43,44)Main Analog Low Power Input
TP10+3.3V_ADCU23, LDO RegulatorADC's Digital I/O supply
TP11GND--
TP12GND--
TP13SPI-DQ3/M0MIO_5Remove SD card and short with TP14 for JTAG only mode
TP14GND--


On-board Peripherals

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hiddentrue
idComments

Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs


J2-120

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hiddentrue
idComments

Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection

you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.

Example:

Test PointSignalB2BNotes
10PWR_PL_OK


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titleTest Points InformationOn board peripherals

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Test PointSignalConnected toNotes
TP1+1.0V

U37, DC-DC Converter

PL-VCCINT
TP2ADC_VAAU38, LDO Regulator
ADC_VAA Analog supply/reference, (3.3V)
TP3+1.5VU43, DC-DC Converter-
TP4+1.8VU45, DC-DC Converter-
TP5VTTU47, DDR Termination Regulator(0.75V)
TP6VTTREFU47, DDR Termination Regulator(0.75V)
TP7+5.0VJP1-(1,2,3)
JP2-(1,2,3)		Main Digital Power Input
TP8+3.3VU46, DC-DC Converter-
TP9+5.0V_VAAJP1-(43,44)Main Analog Low Power Input
TP10+3.3V_ADCU23, LDO RegulatorADC's Digital I/O supply
TP11GND--
TP12GND--
TP13SPI-DQ3/M0MIO_5Remove SD card and short with TP14 for JTAG only mode
TP14GND--

On-board Peripherals

Page properties
hiddentrue
idComments

Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs

...

hiddentrue
idComments

Notes :

...

cellHighlightingtrue

Chip/InterfaceDesignatorNotes
DDR3 SDRAMU12, U13-
Quad SPI FlashU7-
MAC EEPROMU24-
General Purpose EEPROMU21-
SAR ADCsU1, U2, U3, U4, U10, U11, U15, U16, U17, U19-
Clock SourcesU6, U9, U14, U41-
Gigabit Ethernet PHYU8-
USB 2.0 ULPI transceiverU18-
FTDI USB 2.0 to UART/JTAGU39-
LEDsD3, D4, D5-
SwitchesS1, S2, S3-


DDR3 SDRAM

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hiddentrue
idComments

Notes :

Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3)

The TE0716 module has two 500MByte DDR3L SDRAM chips (U12 & U13) fully connected to PS DDR BANK 502, and arranged into 32-bit wide memory bus providing total on-board memory size of 1GByte.

  • Configuration: 256Mx16*
  • Supply voltage: 1.35V (1.5V tolerant).
  • Speed: 1.25ns @ CL11 (DDR3-1600)*
  • Temperature: Industrial Range -40°C to +95°C Tcase.

Notes: * standard value but depends on assembly version.

Quad SPI Flash Memory

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hiddentrue
idComments

Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.

On-board 32MByte QSPI flash memory S25FL256S (U7) could be used to store the initial FPGA configuration file. After configuration completes, the remaining free memory can be used for application data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.

  • Part number: S25FL256SAGBHI20
  • Supply voltage: 3.3V (2.7V - 3.6V).
  • Speed: 133MHz max.
  • Temperature: Industrial Range -40°C to +85°C.
Scroll Title
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titleOn board peripheralsQuad SPI interface MIOs and pins

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Chip/InterfaceDesignatorNotes
DDR3 SDRAMU12, U13-
Quad SPI FlashU7-
MAC EEPROMU24-
General Purpose EEPROMU21-
SAR ADCsU1, U2, U3, U4, U10, U11, U15, U16, U17, U19-
Clock SourcesU6, U9, U14, U41-
Gigabit Ethernet PHYU8-
USB 2.0 ULPI transceiverU18-
FTDI USB 2.0 to UART/JTAGU39-
LEDsD3, D4, D5-
SwitchesS1, S2, S3-

DDR3 SDRAM

Page properties
hiddentrue
idComments

Notes :

Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3)

The TE0716 module has two 500MByte DDR3L SDRAM chips (U12 & U13) fully connected to PS DDR BANK 502, and arranged into 32-bit wide memory bus providing total on-board memory size of 1GByte.

  • Configuration: 256Mx16*
  • Supply voltage: 1.35V (1.5V tolerant).
  • Speed: 1.25ns @ CL11 (DDR3-1600)*
  • Temperature: Industrial Range -40°C to +95°C Tcase.

Notes: * standard value but depends on assembly version.

Quad SPI Flash Memory

Page properties
hiddentrue
idComments

Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.

On-board 32MByte QSPI flash memory S25FL256S (U7) could be used to store the initial FPGA configuration file. After configuration completes, the remaining free memory can be used for application data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.

MIO PinSchematicU7 PinNotes
MIO1SPI-CSCS#-
MIO3SPI-DQ1/M1SO/IO1-
MIO4SPI-DQ2/M2WP#/IO2-
MIO2SPI-DQ3/M3HOLD#/IO3-
MIO5SPI-DQO/M0SI/IO0-
MIO6SPI-SCK/M4SCK-


EEPROM

There are 2x EEPROMs sharing the same I2C bus (I2C interface is connected to the Zynq I2C PS (I2C 0).:

MAC-Address EEPROM

A 2Kbit 24AA025E48 serial EEPROM I2C memory (U24), connected to the BANK501 PSMIOs, contains a globally unique 48-bit node address, which is compatible with EUI-48TM specification. The device is organized as two blocks of 128 x 8-bit memory. One of the blocks, the upper half of the array (80h-FFh), stores the 48-bit node address and is permanently write-protected, while the other block is available for application use.

  • Part number: 24AA025E48T-I/OT
  • Supply voltage: 1.8V (1.7V - 5.5V).
  • FCLK: 100KHz (@VCC=1.8V)
  • Temperature: Industrial Range -40°C to +85°C.


General Purpose EEPROM

The TE0716 module has also a 512Kb Serial EEPROM I2C memory (U21).

  • Part number: CAT24C512WI-GT3
  • Supply voltage: 1.8V (1.8V - 5.5V).
  • FCLK: 100KHz/400KHz/1MHz
  • Part number: S25FL256SAGBHI20
  • Supply voltage: 3.3V (2.7V - 3.6V).
  • Speed: 133MHz max.
  • Temperature: Industrial Range -40°C to +85°C.

...

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titleQuad SPI I2C EEPROM interface MIOs and pins

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MIO PinSchematic
U7
U21/U24 PinNotes
MIO1SPI-CSCS#-
MIO3SPI-DQ1/M1SO/IO1-
MIO4SPI-DQ2/M2WP#/IO2-
MIO2SPI-DQ3/M3HOLD#/IO3-
MIO5SPI-DQO/M0SI/IO0-
MIO6SPI-SCK/M4SCK-

EEPROM

There are 2x EEPROMs sharing the same I2C bus (I2C interface is connected to the Zynq I2C PS (I2C 0).:

MAC-Address EEPROM

A 2Kbit 24AA025E48 serial EEPROM I2C memory (U24), connected to the BANK501 PSMIOs, contains a globally unique 48-bit node address, which is compatible with EUI-48TM specification. The device is organized as two blocks of 128 x 8-bit memory. One of the blocks, the upper half of the array (80h-FFh), stores the 48-bit node address and is permanently write-protected, while the other block is available for application use.

  • Part number: 24AA025E48T-I/OT
  • Supply voltage: 1.8V (1.7V - 5.5V).
  • FCLK: 100KHz (@VCC=1.8V)
  • Temperature: Industrial Range -40°C to +85°C.

General Purpose EEPROM

The TE0716 module has also a 512Kb Serial EEPROM I2C memory (U21).

  • Part number: CAT24C512WI-GT3
  • Supply voltage: 1.8V (1.8V - 5.5V).
  • FCLK: 100KHz/400KHz/1MHz
  • Temperature: Industrial Range -40°C to +85°C.
MIO46I2C_SCL         SCL-
MIO47I2C_SDA         SDA-



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titleI2C address for EEPROM

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I2C DeviceI2C AddressDesignatorNotes
2K Serial EEPROMs with EUI-48™

0xA6 (write)
0xA7 (read)
0x53 (7bit)

U24-
512Kb Serial EEPROM

0xA0 (write)
0xA1 (read)
0x50 (7bit)

U21-


ADCs

The TE0716 module has 10x 12-Bit Low Power SAR Analog-to-Digital Converter, fully differential input, signed output, with SPI−compatible interface (NCD98011), which are connected to the FPGA PL BANK34.

  • Part number: NCD98011XMXTAG
  • Analog supply and ADC reference voltage (VCC): 3.3V (1.65V – 3.6V).
  • Digital I/O supply voltage (VDD): 3.3V (1.65V – 3.6V).
  • Differential analog inputs: 1 per ADC.
  • Full−Scale Analog Input Voltage Span: +VCC max Vppd, -VCC min Vppd, (VCM to VCC/2).
  • Absolute Voltage Range Vinp or Vinn to GND: VCC + 0.1V
  • Sampling rate: 2 MSPS max.
  • SNR: 70dB @1KHz fIN.
  • THD: -80dB @1KHz fIN.
  • Junction Temperature: Range -40°C to +125°C.

All the analog inputs are connected to B2B JP1 as follows:

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titleI2C EEPROM ADC Analog interface MIOs and pins

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MIO Pin
DesignatorSchematic
U21/U24 Pin
B2B JP1 pinNotes
MIO46
U1
I2C_SCL         SCL-
MIO47I2C_SDA         SDA-
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titleI2C address for EEPROM
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I2C DeviceI2C AddressDesignatorNotes
2K Serial EEPROMs with EUI-48™

0xA6 (write)
0xA7 (read)
0x53 (7bit)

U24-
512Kb Serial EEPROM

0xA0 (write)
0xA1 (read)
0x50 (7bit)

U21-

ADCs

The TE0716 module has 10x 12-Bit Low Power SAR Analog-to-Digital Converter, fully differential input, signed output, with SPI−compatible interface (NCD98011), which are connected to the FPGA PL BANK34.

  • Part number: NCD98011XMXTAG
  • Analog supply and ADC reference voltage (VCC): 3.3V (1.65V – 3.6V).
  • Digital I/O supply voltage (VDD): 3.3V (1.65V – 3.6V).
  • Differential analog inputs: 1 per ADC.
  • Full−Scale Analog Input Voltage Span: +VCC max Vppd, -VCC min Vppd, (VCM to VCC/2).
  • Absolute Voltage Range Vinp or Vinn to GND: VCC + 0.1V
  • Sampling rate: 2 MSPS max.
  • SNR: 70dB @1KHz fIN.
  • THD: -80dB @1KHz fIN.
  • Junction Temperature: Range -40°C to +125°C.

...

ADC0_P
ADC0_N		106 - 107 

3.3V Max Voltage on any pin.

U2

ADC5_P
ADC5_N

52 - 53 3.3V Max Voltage on any pin.
U3

ADC1_P
ADC1_N

46 - 47 3.3V Max Voltage on any pin.
U4

ADC6_P
ADC6_N

115 - 116 3.3V Max Voltage on any pin.
U10

ADC2_P
ADC2_N

109 - 110 3.3V Max Voltage on any pin.
U11

ADC7_P
ADC7_N

55 - 56 3.3V Max Voltage on any pin.
U15

ADC3_P
ADC3_N

49 - 50 3.3V Max Voltage on any pin.
U16

ADC8_P
ADC8_N

118 - 119 3.3V Max Voltage on any pin.
U17

ADC4_P
ADC4_N

112 - 113 3.3V Max Voltage on any pin.
U19

ADC9_P
ADC9_N

58 - 59 3.3V Max Voltage on any pin.


All the digital signals are connected to PL Bank 34 as follows:

46 - 47 
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titleADC Analog interface PL and pins

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DesignatorSchematic
B2B JP1 pin
PL PinNotes
U1
ADC0_P
ADC0_N		106 - 107 

3.3V Max Voltage on any pin.

U2

ADC5_P
ADC5_N

52 - 53 3.3V Max Voltage on any pin.
U3

ADC1_P
ADC1_N

S0_CLK          

S0_CSN          

S0_OUT          

J18

J16

K18

3.3V Max Voltage on any pin.
U4

ADC6_P
ADC6_N

115 - 116 
U2

S5_CLK          

S5_CSN          

S5_OUT          

M21

T16

T17

3.3V Max Voltage on any pin.
U10

ADC2_P
ADC2_N

109 - 110 
U3

S1_CLK          

S1_CSN          

S1_OUT          

L18

J21

L19

3.3V Max Voltage on any pin.
U11

ADC7_P
ADC7_N

55 - 56 
U4

S6_CLK          

S6_CSN          

S6_OUT          

J22

K21

J20

3.3V Max Voltage on any pin.
U15

ADC3_P
ADC3_N

49 - 50 
U10

S2_CLK          

S2_CSN          

S2_OUT          

M22 

R21 

R20 

3.3V Max Voltage on any pin.
U16

ADC8_P
ADC8_N

118 - 119 
U11

S7_CLK          

S7_CSN          

S7_OUT          

L22 

M20 

M19 

3.3V Max Voltage on any pin.
U17

ADC4_P
ADC4_N

112 - 113 
U15

S3_CLK          

S3_CSN          

S3_OUT          

J17 

J15 

L17 

3.3V Max Voltage on any pin.
U19

ADC9_P
ADC9_N

58 - 59 
U16

S8_CLK          

S8_CSN          

S8_OUT          

M17 

N18 

N17 

3.3V Max Voltage on any pin.

All the diigital signals are connected to PL Bank 34 as follows:

U19
U17

S4_CLK          

S4_CSN          

S4_OUT          

P17 

L21 

P18 

3.3V Max Voltage on any pin.
U19

S9_CLK          

S9_CSN          

S9_OUT          

K15 

P21 

P20 

3.3V Max Voltage on any pin.
Scroll Title
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titleADC interface PL and pins
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DesignatorSchematicPL PinNotes
U1U2U3U4U10U11U15U16U17


Clock Sources

The TE0716 board is equipped with 4x Oscillators, every one with its specific function.

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titlePower Sequency


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Voltage Monitor Circuit

Scroll Title
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titleVoltage Monitor Circuit


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Technical Specifications

Absolute Maximum Ratings

V
Scroll Title
anchorTable_TS_AMR
titlePS absolute maximum ratings

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SymbolsDescriptionMinMaxUnitReference
+5.0VMain Supply voltage from the carrier board-0.36.0VNCV6357 Datasheet
NCV6323 Datasheet
NCP160 Datasheet
+5.0V_VAAAnalog Supply voltage from the carrier board-0.36.0VNCP160 Datasheet
MIO 500I/O input voltage for MIO bank 500-0.43.85VXilinx DS187 Datasheet
MIO 501I/O input voltage for MIO bank 501-0.42.35VXilinx DS187 Datasheet
PL HRI/O input voltage for HR banks-0.43.85VXilinx DS187 Datasheet
ADCx_P/NI/O input voltage for ADCs analog inputs-0.33.63VNCD98011 Datasheet
Scroll Title
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titlePS absolute maximum ratings
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SymbolsDescriptionMinMaxUnit
VVVVVVV