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Board to Board (B2B) I/Os
FPGA bank number and number Number of I/O signals FPGA bank numbers connected to the B2B connectorconnectors:
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anchor | Table_SIP_B2B |
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title | General PL I/O to B2B connectors information |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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sortEnabled | false |
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cellHighlighting | true |
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B2B Connector | Interfaces | Number of I/O | Notes |
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J1
| User I/O | 48 singel ended, 24 differential | Connected to Bank 13 | 4 Single ended | MIO10-13 | CANH , CANL | 2 single ended | MIO8, MIO9 | J2
| User I/O | 22 singel ended, 11 differential |
| 38 single ended | MIO16-53 | SoM Control Signals | 5 | RESET, RST_OUT, BOOT_R, | JTAG Interface | 4 | TCK , TDO, TDI, TMS | J3
| User I/O | 20 Single ended, 10 differential
| Connected to Bank 35 | 34 single ended, 17 differential | Connected to Bankd 33 | Ethernet 1 | 4 single ended, 2 differential | ETH_CTREF , ETH_TD+, ETH_TD- , ETH_RD+, ETH_RD-, ETH_LED1, ETH_LED2, ETH_LED3 | Ethernet 2 | 4 single ended, 2 differential | ETH_CTREF , ETH_TD+, ETH_TD- , ETH_RD+, ETH_RD-, ETH_LED1, ETH_LED2, ETH_LED3 |
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On-board Connector
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anchor | Table_SIP_B2B |
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title | General PL I/O to B2B connectors information |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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B2B Connector | Interfaces | Number of I/O | Notes |
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J5
| User I/O | 48 singel ended, 24 differential | Connected to Bank 13 | 34 single ended, 17 differential | Connected to Bank 33 | J6
| User I/O | 42 singel ended, 21 differential |
| 27 single ended | MIO16... MIO39 + MIO 51-53 | 4 single ended | MIO10-13 | SoM Control Signals | 3 | RESET, RST_OUT, BOOT_R | JTAG Interface | 4 | TCK , TDO, TDI, TMS | CANH , CANL | 2 single ended | MIO8 , MIO9 |
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anchor | Table_SIP_JTG_Mode |
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title | JTAG pModeMode |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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S2 | ON | OFF | Default | Description |
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1 | Normal mode | Adapter board CPLD update mode | ON | Update Mode JTAG access to SC CPLD only | 2 | Do not use (illegal setting) | Normal mode | OFF | Must be in OFF state always. | 3 | VIO connected to 3.3V | Power VIO from pin header J2 | OFF | User I/O Voltage | 4 | Power 3.3V from USB | Power 3.3V from pin header J2 | OFF | Power on-board peripherals (FTDI chip & SC CPLD, ...) |
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Page properties |
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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SD Card Socket
VDD for SD card holder is 3.3V.
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anchor | Table_OBP |
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title | On board peripherals |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signals | Connected to | B2B | Notes |
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CD/DAT3 | MIO45 | J2-31 |
| CMD | MIO41 | J2-29 |
| CLK | MIO40_CLK | J2-34 |
| DAT0 | MIO42 | J2-37 |
| DAT1 | MIO43 | J2-40 |
| DAT2 | MIO44 | J2-32 |
| CD | MIO46 | J2-35 |
| WP | MIO47 | J2-33 |
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Scroll Title |
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anchor | Table_OBP_SPI |
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title | Quad SPI interface MIOs and pins |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal ETH1 | B2B | Signal ETH2 | B2B | Notes |
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ETH1_TD+ | J3-58 | ETH2_TD+ | J3-28 | Transfer | ETH1_TD- | J3-56 | ETH2_TD- | J3-26 |
| ETH1_RD+ | J3_52 | ETH2_RD+ | J3-22 | Receive | ETH1_RD- | J3-50 | ETH2_RD- | J3-20 |
| ETH1_CTREF | J3_57 | ETH2_CTREF | J3-25 |
| ETH1_LED1 | J3-55 | ETH2_LED1 | J3-23 | Yellow LED- Activity | ETH1_LED3 | J3-51 | ETH2_LED3 | J3-19 | Green Green- Link |
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Push button
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anchor | Table_OBP_LEDPush_Button |
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title | On-board LEDspush button |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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DesignatorColor | Connected to | B2B | Active Level | Note |
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D1-AS1 | RedRESET | MIO48 | J2-307 | Active high | General Input RESET |
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LEDs
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anchor | Table_OBP_LED |
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title | On-board LEDs |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Designator | Color | Connected to | B2B | Active Level | Note |
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D1-A | Red | MIO48 | J2-30 | Active high |
| D1-B | Yellow | MIO49 | J2-38 | Active | D1-B | Yellow | MIO49 | J2-38 | Active high |
| D1-C | Green | MIO50 | J2-36 | Active high |
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Power and Power-On Sequence
Power Supply
Power Single 12V power supply with minimum current capability of 3.5 A for system startup 5A is recommended to operate the board.
Power Consumption
Scroll Title |
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anchor | Table_PWR_PC |
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title | Power Consumption |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Power Input Pin | Typical Current |
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VIN | TBD* | VBATT | TBD* |
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* TBD - To Be Determined
Power Distribution Dependencies
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anchor | Figure_PWR_PD |
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title | Power Distribution |
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Scroll Ignore | add drawIO object here: Attention if you copy from other page, objects are only linked. |
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draw.io Diagram |
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border | true |
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viewerToolbar | true |
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fitWindow | false |
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diagramName | TE0728_PWR_DP |
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simpleViewer | false |
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width | |
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diagramWidth | 287 |
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revision | 1 |
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Scroll Only |
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image link to the generate drawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed |
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