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Template Revision 2.3
TRM Name always "TE Series Name" +TRM, for example "TE0720 TE0728 TRM" |
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- Samtec Tiger Eye Terminal Socket ( 80 pins, 2 rows)
- Micro SD card socket
- 3 User LEDs, Red,Yellow, Green
- Two RJ45 Gigabit Ethernet socket
- Trenz 6x6 module connector strips (3 x Samtec TEM Tiger Eye series connectors)
- Barrel Jack for 12V power supply
- One user push button
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| Scroll Title |
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| anchor | Figure_OV_BD |
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| title | TE0728 block diagram |
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| Scroll Ignore |
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| draw.io Diagram |
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| border | true |
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| viewerToolbar | true |
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| fitWindow | false |
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| diagramDisplayName | |
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| lbox | true |
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| revision | 23 |
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| diagramName | TE0728_BD |
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| simpleViewer | false |
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| width | |
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| links | auto |
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| tbstyle | hidden |
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| diagramWidth | 641 |
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- Board to Board Connector, J1-J2-J3
- LEDs , D1
- CR1220 Backup-Battery holder, B1
- SD Card Connector, J10
- RJ45 Gigabit Ethernet connector, J7-J8
- User push-button, S1
- Jumper, J4
- Barrel jack for power supply, J9
- Jumper, J11
Initial Delivery State
There is no hardware component to be programmed on teh carrier.
| Scroll Title |
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| anchor | Table_OV_IDS |
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| title | Initial delivery state of programmable devices on the module |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Storage device name | Content | Notes | Quad SPI Flash | Not Programmed | DDR3 SDRAM | Not Programmed | RTC | Not Programmed |
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Control Signals
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- Overview of Boot Mode, Reset, Enables,
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Boot Process
| Scroll Title |
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| anchor | Table_OV_BP |
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| title | Boot process. |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Signal | Designator | B2B | MODE Signal StateLevel | Boot Mode | High or open | QSPI
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Boot_R | J4 | J2-11 | Open | QSPI | | Short | SD Card |
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Reset Process
There is a user push button which is used for RESET signal.
| Scroll Title |
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| anchor | Table_OV_BP |
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| title | Reset process. |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Signal | Designator | B2B | Active Level |
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RESET | S1 | J2-7 | Active High |
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Signals, Interfaces and Pins
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| Scroll Title |
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| anchor | Table_SIP_B2B |
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| title | General PL I/O to B2B connectors information |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| FPGA Bank | B2B Connector | I/O Signal Count | Voltage Level | Notes |
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JTAG Interface
JTAG access to the Xilinx XXXXXXX FPGA through B2B connector JM2.
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