Page History

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1. Xilinx Zynq-7000 SoC, U1
2. Lattice Semiconductor MachXO2 1200HC CPLD, U14
3. 4Gbit DDR3L SDRAM, U19
4. 4Gbit DDR3L SDRAM, U10
5. TI TPS3106 voltage monitor circuit, U4
6. TI TPS78018 LDO, U21
7. I²C voltage translator, U25
8. Intersil ISL12020MIRZ Real Time Clock, U17
9. Red LED D1, Green LED D2
10. 32 MByte QSPI Flash memory, U38
11. SiTime SiT8008 33.333333 MHz oscillator, U61
12. SI5338A programmable quad PLL clock generator, U2
13. SiTime SiT8008 25.000000 MHz oscillator, U3
14. TPS74801 LDO @1.5V, U23
15. LT quad 4A PowerSoC DC-DC converter (@1.0V), U13
16. LT quad 4A PowerSoC DC-DC converter (@3.3V, @1,8V, @1.2V_MGT, @1.0V_MGT), U16
17. Samtec ASP-122952-01 160-pin stacking strip (2 rows a 80 positions), J2
18. Samtec ASP-122952-01 160-pin stacking strip (2 rows a 80 positions), J3
19. Samtec ASP-122952-01 160-pin stacking strip (2 rows a 80 positions), J1
20. Marvell Alaska 88E1512 Gigabit Ethernet PHY, 20
    
21. Marvell Alaska 88E1512 Gigabit Ethernet PHY, U18
22. Micron Technology 4 GByte eMMC, U15
23. Microchip 128Kbit I²C EEPROM, U26
24. Microchip 2Kbit I²C MAC EEPROM, U24
25. Microchip 2Kbit I²C MAC EEPROM, U22
26. TPS51206 DDR reference voltage and termination regulator, U6
27. TPS799 LDO @1.8V_MGT, U5
28. SiTime SiT8008 25.000000 MHz oscillator, U11

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The TE0784 board is programmed in the SC CPLD firmware to boot initially from the on-board QSPI Flash memory U38. See section bootmode in the TE0784 SC CPLD reference Wiki page.  Link muss noch angepasst werden

The JTAG interface of the module is provided for storing the data to the QSPI Flash memory through the Zynq-7000 device.

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