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On the TE0791 board are footprints available for 10-pin JST Wire-To-Board IDC connectors J4 and J5 with two different pin-assignments, where all XMOD signals A - H are available. The pin- and signal-assignment with standard System Controller CPLD firmware of the XMOD board are as follows:
usable as GPIO
Pin Name | J4 Pin Number | J5 Pin Number | Signal | Note |
---|---|---|---|---|
A | 1 | 10 | UART TXD | |
B | 3 | 8 | UART RXD | - |
C | 2 | 9 | TCK | - |
D | 4 | 7 | TDO | - |
E | 5 | 6 | LED on TE0790 | usable as GPIO |
F | 76 | 5 | TDI | - |
G | 67 | 4 | Button on TE0790 | usable as GPIO |
H | 8 | 3 | TMS | - |
VIO | 9 | 2 | VCC / VCCIO | - |
GND | 10 | 1 | Ground | - |
Table 4: IDC connector J4 and J5 signal assignment with standard TE0790 CPLD firmware
On the TE0791 board are footprints available for 6-pin JST Wire-To-Board IDC connectors J3 and J6 with two different pin-assignments, where the XMOD signals C, D, F and H are available. At standard System Controller CPLD firmware, this signals create the JTAG interface of the XMOD board:
Pin Name | J3 Pin Number | J6 Pin Number | Signal | Note |
---|---|---|---|---|
C | 6 | 1 | TCK | - |
D | 5 | 2 | TDO | - |
F | 4 | 3 | TDI | - |
H | 3 | 4 | TMS | - |
VIO | 2 | 5 | VCC / VCCIO | - |
GND | 1 | 6 | Ground | - |
Table 4:5: IDC connector J3 and J6 signal assignment with standard TE0790 CPLD firmware
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Date | Revision | Notes | PCN | Documentation Link |
---|---|---|---|---|
- | 01 | current available revision | - | TE0791-01 |
Table 56: Board hardware revision history.
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Date | Revision | Contributors | Description | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
| Ali Naseri | initial document |
Table 67: Document change history.
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