Page History

Design Name always "TE Series Name" + Design name, for example "TEI0006 Test Board"

Important General Note:

• Export PDF to download, if quartus revision is changed!

• Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

  • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)

    • Figure template (note: inner scroll ignore/only only with drawIO object):

      Scroll Title
      anchor Figure_xyz title Text
      Scroll Ignore Create DrawIO object here: Attention if you copy from other page, use Scroll Only image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

      
      

    • Table template:

      • Layout macro can be use for landscape of large tables
      • Set column width manually(can be used for small tables to fit over whole page) or leave empty (automatically)

    • 
      

      Scroll Title
      anchor Table_xyz title Text
      Scroll Table Layout orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn 1 sortEnabled false cellHighlighting true Example Comment 1 2

      
      

• ...

Notes :

• short description of the design

• Short Link of "Scroll only" macro:

  • Use short link the Wiki Resource page, for example: http://trenz.org/tei0006-info

  • List of available short links: https://wiki.trenz-electronic.de/display/CON/Redirects

Notes :

• Add basic key futures, which can be tested with the design

• Quartus Prime Lite 21.1
• Intel SoC FPGA EDS Standard Edition 20.1
• Yocto
• SD
• UART
• ETH
• USB
• I2C
• QSPI
• HDMI
• MAC from EEPROM
• DDR3 memory
• User LED

Notes:

• add every update file on the download
• add design changes on description

• add known Design issues and general notes for the current revision
• do not delete known issue, add fixed version time stamp if  issue fixed

Notes :

• list of software which was used to generate the design

Notes :

• list of hardware which was used to generate the design
• mark the module and carrier board, which was used tested with an ^*

^*used as reference

^*used as reference

^*used as reference

Notes :

• content of the zip file

Notes :

• prebuilt files
• Template Table:

  • 
    

    Scroll Title
    anchor Table_PF title-alignment center title Prebuilt files (only on ZIP with prebult content)
    Scroll Table Layout orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn 1 sortEnabled false cellHighlighting true File File-Extension Description SOPC Information File *.sopcinfo File with description of the .qsys file to create software for the target hardware SRAM Object File *.sof Ram configuration file Programmer Object File *.pof FPGA configuration file JTAG Indirect Configuration file *.jic Flash configuration file Raw binary file *.rbf FPGA configuration file Diverse Reports --- Report files in different formats Software-Application-File *.elf Software application for NIOS II processor system Device Tree *.dtb Device device tree blobdtb SFP-File *.sfp boot Boot image with SPL (econdary program loaderSecondary Program Loader) BIN-File *.bin Image with linux kernel and ram disk CONF-File *.conf Boot configuration file (extlinux.conf) Yocto linux image *.wic Linux image for SD card

    
    

• Important set new Quartus version link on every Design update of new Quartus version!
• Set Link to download folder (Remove ../de/.. ../en/.. from url) for example: https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/6x8/TEI0006/Reference_Design/20.4/test_board

• Basic Design Steps

• Add/ Remove project specific description

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch.

Note:

• Programming and Startup procedure

Check Module and Carrier TRMs for proper HW configuration before you try any design.

Note:

• Description of Block Design - Project, Block Design - Platform Designer, ... Block Design Pictures from Export...

#include "socfpga_cyclone5.dtsi"
#include "dt-bindings/interrupt-controller/irq.h"
#include <dt-bindings/gpio/gpio.h>

/ {
	chosen {
		bootargs = "earlyprintk";
		stdout-path = "serial0:115200n8";
	};

	axi_dma_clk: axi_dma_clk {
		#clock-cells = <0x0>;
		compatible = "fixed-clock";
		clock-frequency = <100000000>;
		clock-output-names = "axi_dma_clock";
	};

	sys_clk: sys_clk {
		#clock-cells = <0x0>;
		compatible = "fixed-clock";
		clock-frequency = <80000000>;
		clock-output-names = "sys_clock";
	};

	hdmi_pll: hdmi_pll {
		compatible = "altr,altera_iopll-18.1";
		#clock-cells = <1>;
			hdmi_pll_outclk0: hdmi_pll_outclk0 {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <148500000>;
			clock-output-names = "hdmi_pll-outclk0";
		}; 
	};

        vdd: regulator-vdd {
                compatible = "regulator-fixed";
                regulator-name = "fixed-supply";
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <1800000>;
                regulator-always-on;
        };

        vdd_3_3: regulator-vdd {
                compatible = "regulator-fixed";
                regulator-name = "fixed-supply";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                regulator-always-on;
        };

        vref: regulator-vref {
                compatible = "regulator-fixed";
                regulator-name = "fixed-supply";
                regulator-min-microvolt = <2500000>;
                regulator-max-microvolt = <2500000>;
                regulator-always-on;
        };

	soc {
		 i2c1: i2c@ffc05000 {
			status = "okay";
			speed-mode = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			adv7511: adv7511@39 {
				compatible = "adi,adv7511";
				reg = <0x39>, <0x3f>;
				reg-names = "primary", "edid";

				adi,input-depth = <8>;
				adi,input-colorspace = "yuv422";
				adi,input-clock = "1x";
				adi,input-style = <1>;
				adi,input-justification = "right";
				adi,clock-delay = <(0)>;

				avdd-supply = <&vdd>;
				dvdd-supply = <&vdd>;
				pvdd-supply = <&vdd>;
				dvdd-3v-supply = <&vdd_3_3>;
				bgvdd-supply = <&vdd>;

				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;
						adv7511_in: endpoint {
							remote-endpoint = <&axi_hdmi_out>;
						};
					}; 

					port@1 {
						reg = <1>;	
					};

				}; 
			};
		};

		sys_hps_bridges: bridge@ff200000 {
			compatible = "simple-bus";
			reg = <0xff200000 0x00200000>;
			reg-names = "axi_h2f_lw";
			#address-cells = <2>;
			#size-cells = <1>;
			ranges = <0x00000001 0x00001000 0xff201000 0x00000010>,
				<0x00000001 0x00001010 0xff201010 0x00000010>,
				<0x00000001 0x00001020 0xff201020 0x00000008>,
				<0x00000001 0x00001030 0xff201030 0x00000008>,
				<0x00000001 0x00010000 0xff210000 0x00000800>,
				<0x00000001 0x00020000 0xff220000 0x00010000>;

			jtag_uart: jtag-uart@100001030 {
				compatible = "altr,juart-1.0";
				reg = <0x00000001 0x000001030 0x00000008>;
				interrupts = <0 40 4>;
			};

			sysid: sysid@100001020 {
				compatible = "altr,sysid-1.0";
				reg = <0x00000001 0x00001020 0x00000008>;
			};

			fpga_sw: fpga-sw@100001000 {
				compatible = "altr,pio-1.0";
				reg = <0x00000001 0x00001000 0x00000010>;
				interrupts = <0 41 1>;
				altr,gpio-bank-width = <2>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-cells = <1>;
				interrupt-controller;
				altr,interrupt-type = <IRQ_TYPE_EDGE_BOTH>;
			};

			fpga_led: fpga-led@100001010 {
				compatible = "altr,pio-1.0";
				reg = <0x00000001 0x00001010 0x00000010>;
				altr,gpio-bank-width = <2>;
				#gpio-cells = <2>;
				gpio-controller;
			};

			leds {
				compatible = "gpio-leds";

				fpgaled0 {
					label = "fpga_led0";
					gpios = <&fpga_led 0 1>;
				};

				fpgaled1 {
					label = "fpga_led1";
					gpios = <&fpga_led 1 1>;
				};
			};

			hdmi_axi_dmac: axi-dmac@100010000 {
				compatible = "adi,axi-dmac-1.00.a";
				reg = <0x00000001 0x00010000 0x00000800>;
				#dma-cells = <1>;
				interrupt-parent = <&intc>;
				interrupts = <0 42 4>;
				clocks = <&axi_dma_clk 0>;
				status = "okay";

				adi,channels {
					#size-cells = <0>;
					#address-cells = <1>;

					dma-channel@0 {
						reg = <0>;
						adi,source-bus-width = <64>;
						adi,source-bus-type = <0>;
						adi,destination-bus-width = <64>;
						adi,destination-bus-type = <1>;
					};
				};
			};


			hdmi_axi_tx: axi-hdmi-tx@100020000 {
				compatible = "adi,axi-hdmi-tx-1.00.a";
				reg = <0x00000001 0x00020000 0x10000>;
				dmas = <&hdmi_axi_dmac 0>;
				dma-names = "video";
				clocks = <&hdmi_pll_outclk0 0>;
				status = "okay";

				port {
					axi_hdmi_out: endpoint {
						remote-endpoint = <&adv7511_in>;
					};
				};
			};
		};
	};
 };

&gmac1 {

	#address-cells = <1>;
	#size-cells = <0>;

	status = "okay";
	phy-mode = "rgmii";

	ethernet-phy@1 {
		reg = <1>;
		adi,rx-internal-delay-ps = <2000>;
		adi,tx-internal-delay-ps = <2000>;
	};
};

&i2c1 {
	status = "okay";
	clock-frequency = <100000>;
	eeprom: eeprom@50 {
		compatible = "atmel,24c08";
		reg = <0x50>;
	};
};

#include "socfpga_cyclone5.dtsi"
#include "dt-bindings/interrupt-controller/irq.h"
#include <dt-bindings/gpio/gpio.h>	

/ {
	chosen {
		bootargs = "earlyprintk";
		stdout-path = "serial0:115200n8";
	};

	axi_dma_clk: axi_dma_clk {
		#clock-cells = <0x0>;
		compatible = "fixed-clock";
		clock-frequency = <100000000>;
		clock-output-names = "axi_dma_clock";
	};

	sys_clk: sys_clk {
		#clock-cells = <0x0>;
		compatible = "fixed-clock";
		clock-frequency = <80000000>;
		clock-output-names = "sys_clock";
	};

	hdmi_pll: hdmi_pll {
		compatible = "altr,altera_iopll-18.1";
		#clock-cells = <1>;
			hdmi_pll_outclk0: hdmi_pll_outclk0 {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <148500000>;
			clock-output-names = "hdmi_pll-outclk0";
		}; 
	};

        vdd: regulator-vdd {
                compatible = "regulator-fixed";
                regulator-name = "fixed-supply";
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <1800000>;
                regulator-always-on;
        };

        vdd_3_3: regulator-vdd {
                compatible = "regulator-fixed";
                regulator-name = "fixed-supply";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                regulator-always-on;
        };

        vref: regulator-vref {
                compatible = "regulator-fixed";
                regulator-name = "fixed-supply";
                regulator-min-microvolt = <2500000>;
                regulator-max-microvolt = <2500000>;
                regulator-always-on;
        };


	soc {
		i2c1: i2c@ffc05000 {
			status = "okay";
			speed-mode = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			adv7511: adv7511@39 {
				compatible = "adi,adv7511";
				reg = <0x39>, <0x3f>;
				reg-names = "primary", "edid";

				adi,input-depth = <8>;
				adi,input-colorspace = "yuv422";
				adi,input-clock = "1x";
				adi,input-style = <1>;
				adi,input-justification = "right";
				adi,clock-delay = <(0)>;

				avdd-supply = <&vdd>;
				dvdd-supply = <&vdd>;
				pvdd-supply = <&vdd>;
				dvdd-3v-supply = <&vdd_3_3>;
				bgvdd-supply = <&vdd>;

				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;
						adv7511_in: endpoint {
							remote-endpoint = <&axi_hdmi_out>;
						};
					}; 

					port@1 {
						reg = <1>;	
					};

				}; 
			};
		};

		sys_hps_bridges: bridge@ff200000 {
			compatible = "simple-bus";
			reg = <0xff200000 0x00200000>;
			reg-names = "axi_h2f_lw";
			#address-cells = <2>;
			#size-cells = <1>;
			ranges = <0x00000001 0x00001000 0xff201000 0x00000010>,
				<0x00000001 0x00001010 0xff201010 0x00000010>,
				<0x00000001 0x00001020 0xff201020 0x00000008>,
				<0x00000001 0x00001030 0xff201030 0x00000008>,
				<0x00000001 0x00010000 0xff210000 0x00000800>,
				<0x00000001 0x00020000 0xff220000 0x00010000>;

			fpga_sw: fpga-sw@100001000 {
				compatible = "altr,pio-1.0";
				reg = <0x00000001 0x00001000 0x00000010>;
				interrupts = <0 41 1>;
				altr,gpio-bank-width = <2>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-cells = <1>;
				interrupt-controller;
				altr,interrupt-type = <IRQ_TYPE_EDGE_BOTH>;
			};

			fpga_led: fpga-led@100001010 {
				compatible = "altr,pio-1.0";
				reg = <0x00000001 0x00001010 0x00000010>;
				altr,gpio-bank-width = <2>;
				#gpio-cells = <2>;
				gpio-controller;
			};

			leds {
				compatible = "gpio-leds";

				fpgaled0 {
					label = "fpga_led0";
					gpios = <&fpga_led 0 1>;
				};

				fpgaled1 {
					label = "fpga_led1";
					gpios = <&fpga_led 1 1>;
				};
			};
			
			sysid: sysid@100001020 {
				compatible = "altr,sysid-1.0";
				reg = <0x00000001 0x00001020 0x00000008>;
			};
			
			jtag_uart: jtag-uart@100001030 {
				compatible = "altr,juart-1.0";
				reg = <0x00000001 0x000001030 0x00000008>;
				interrupts = <0 40 4>;
			};

			hdmi_axi_dmac: axi-dmac@100010000 {
				compatible = "adi,axi-dmac-1.00.a";
				reg = <0x00000001 0x00010000 0x00000800>;
				#dma-cells = <1>;
				interrupt-parent = <&intc>;
				interrupts = <0 42 4>;
				clocks = <&axi_dma_clk 0>;
				status = "okay";

				adi,channels {
					#size-cells = <0>;
					#address-cells = <1>;

					dma-channel@0 {
						reg = <0>;
						adi,source-bus-width = <64>;
						adi,source-bus-type = <0>;
						adi,destination-bus-width = <64>;
						adi,destination-bus-type = <1>;
					};
				};
			};


			hdmi_axi_tx: axi-hdmi-tx@100020000 {
				compatible = "adi,axi-hdmi-tx-1.00.a";
				reg = <0x00000001 0x00020000 0x10000>;
				dmas = <&hdmi_axi_dmac 0>;
				dma-names = "video";
				clocks = <&hdmi_pll_outclk0 0>;
				status = "okay";

				port {
					axi_hdmi_out: endpoint {
						remote-endpoint = <&adv7511_in>;
					};
				};
			};
		};
	};
};

&gmac1 {

	#address-cells = <1>;
	#size-cells = <0>;

	status = "okay";
	phy-mode = "rgmii-id";

	ethernet-phy@1 {
		reg = <1>;
		adi,rx-internal-delay-ps = <2000>;
		adi,tx-internal-delay-ps = <2000>;
	};

};

• Note this list must be only updated, if the document is online on public doc!
• It's semi automatically, so do following
  

  • Add new row below first

  • Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

  • Metadata is only used of compatibility of older exports