Page History
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CPLD Device: LCMX02-256HC
Feature Summary
- JTAG routing
- Boot Mode settings
- Power Management
Firmware Revision and supported PCB Revision
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Name | Direction | Pin | Description | ||||
---|---|---|---|---|---|---|---|
C_TCK | in | 30 | JTAG B2B | ||||
C_TDI | in | 32 | JTAG B2B | ||||
C_TDO | out | 1 | JTAG B2B | ||||
C_TMS | in | 29 | JTAG B2B | ||||
EN1 | in | 27 | Power Enable from B2B Connector (Positive Enable) / currently_not_used | ||||
ERR_OUT | in | 4 | PS_ERROR_OUT, see ug1085 | ||||
ERR_STATUS | in | 5 | PS_ERROR_STATUS, see ug1085 | ||||
JTAGEN | in | 26 | Enable JTAG access to CPLD for Firmware update (zero: JTAG routed to module, one: CPLD access) | ||||
MODE | in | 25 | Boot Mode for Zynq/ZynqMP Devices (Flash or SD) | ||||
MODE0 | out | 12 | ZynqMP Boot Mode Pin 0 | ||||
MODE1 | out | 13 | ZynqMP Boot Mode Pin 1 | ||||
MODE2 | out | 14 | ZynqMP Boot Mode Pin 2 | ||||
MODE3 | out | 16 | ZynqMP Boot Mode Pin 3 | ||||
NOSEQ | inout | 23 | / currently_not_used | ||||
PGOOD | out | 28 | Module Power Good. | ||||
PHY_LED1 | in | 17 | ETH PHY LED1 | ||||
TCK | out | 9 | JTAG ZynqMP | ||||
TDI | out | 8 | JTAG ZynqMP | ||||
TDO | in | 10 | JTAG ZynqMP | ||||
TMS | out | 11 | JTAG ZynqMP | ||||
X0 | out | 20 | FPGA IO / PHY_LED1 | ||||
X1 | out | 21 | FPGA IO / Status |
Functional Description
JTAG
JTAG signals routed directly through the CPLD to FPGA. Access between CPLD and FPGA can be multiplexed via JTAGEN (logical one for CPLD, logical zero for FPGA).
Boot Mode
Boot Mode is selected via B2B Pin Mode. See Table 11.1 Boot Modes from Xilinx ug1085.
Mode | Description |
---|---|
Zero | Boot from SD |
On | Boot from Flash |
Power
PGOOD is EN1 and not ER_OUT.
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There is no additional power management.
X0/X1 Pin
Pin | Description |
---|---|
X0 | PHY_LED1 |
X1 | ERR_OUT or ERR_STATUS or MODE |
Appx. A: Change History and Legal Notices
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Date | Document Revision | CPLD Firmware Revision | Supported PCB Revision | Authors | Description | ||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
| REV01 | REV01 |
| Work in progressRevision 01 finished | ||||||||||||||||||||||
2017-03-06 | v.1 | REV01 | REV01 |
| Initial release | ||||||||||||||||||||||
All |
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