Page History
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- JTAG routing
- Boot Mode settings
- Power/Status Management
Firmware Revision and supported PCB Revision
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Name / opt. VHD Name | Direction | Pin | Description |
---|---|---|---|
C_TCK | in | 30 | JTAG B2B |
C_TDI | in | 32 | JTAG B2B |
C_TDO | out | 1 | JTAG B2B |
C_TMS | in | 29 | JTAG B2B |
EN1 | in | 27 | Power Enable from B2B Connector (Positive Enable) / Used only for PGOOD feedback |
ERR_OUT | in | 4 | PS_ERROR_OUT, see ug1085 |
ERR_STATUS | in | 5 | PS_ERROR_STATUS, see ug1085 |
JTAGEN | in | 26 | Enable JTAG access to CPLD for Firmware update (zero: JTAG routed to module, one: CPLD access) |
MODE | in | 25 | Boot Mode for Zynq/ZynqMP Devices (Flash or SD) |
MODE0 | out | 12 | ZynqMP Boot Mode Pin 0 |
MODE1 | out | 13 | ZynqMP Boot Mode Pin 1 |
MODE2 | out | 14 | ZynqMP Boot Mode Pin 2 |
MODE3 | out | 16 | ZynqMP Boot Mode Pin 3 |
NOSEQ | inout | 23 | / currently_not_used |
PGOOD | out | 28 | Module Power Good. |
PHY_LED1 | in | 17 | ETH PHY LED1 |
TCK | out | 9 | JTAG ZynqMP |
TDI | out | 8 | JTAG ZynqMP |
TDO | in | 10 | JTAG ZynqMP |
TMS | out | 11 | JTAG ZynqMP |
X0 | out | 20 | FPGA IO / PHY_LED1 |
X1 | out | 21 | FPGA IO / StatusFirmware Variant |
Functional Description
JTAG
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2 Boot Modes can be selected via B2B Pin Mode. For other options Firmware update is necessary. At the moment JTAG Mode is needed to write QSPI Flash with Xilinx Tools.
Trenz Electronic provides currently 2 Firmware variants, one for SD and one for QSPI usage. At the moment JTAG Mode is needed to write QSPI Flash with Xilinx Tools.
Mode | QSPI-Variant | SD-Variant |
---|---|---|
Zero | JTAG | Boot from SD |
On | Boot from Flash | JTAG |
For other UltraScale+ Boot Modes options custom firmware is needed, see also Table 11.1 Boot Modes from Xilinx UG1085.
Power
PGOOD is EN1 and not ER_OUT. There is no additional power management controlled by CPLD.
X0/X1 Pin
Pin | Description |
---|---|
X0 | PHY_LED1 |
X1 | Firmware Variant: 0 SD boot, 1: QSPI |
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Appx. A: Change History
Revision Changes
- REV01 to REV02
- Boot Mode variants
- X1
Document Change History
To get content of older revision got to "Change History" of this page and select older document revision number.
Date | Document Revision | CPLD Firmware Revision | Supported PCB Revision | Authors | Description | ||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
| REV02 | REV01, REV02 |
| Revision 02 working in process Boot Mode X1 output document style update | ||||||||||||||||||||||
2017-06-08 | v.4 | REV01 | REV01 | John Hartfiel | document style update | ||||||||||||||||||||||
2017-03-06 | v.2 | REV01 | REV01 | John Hartfiel | Revision 01 finished | ||||||||||||||||||||||
2017-03-06 | v.1 | REV01 | REV01 |
| Initial release | ||||||||||||||||||||||
All |
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