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- Prepare HW like described on section 46040558 Programming
- Connect UART USB (most cases same as JTAG)
- Select SD Card as Boot Mode
Note: See TRM of the Carrier, which is used. - Power On PCB
Note: 1. Zynq Boot ROM loads FSBL from SD into OCM, 2. FSBL loads U-boot from SD into DDR, 3. U-boot load Linux from SD into DDR
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- Open Serial Console (e.g. putty)
- Speed: 115200
- COM Port: Win OS, see device manager, Linux OS see dmesg |grep tty (UART is *USB1)
- Linux Console:
Note: Wait until Linux boot finished For Linux Login use:- User Name: root
- Password: root
- You can use Linux shell now.
- I2C 0 Bus type: i2cdetect -y -r 0
- I2C 1 Bus type: i2cdetect -y -r 1
- RTC check: dmesg | grep rtc
- ETH0 works with udhcpc
- USB: insert USB device
Vivado HW Manager
Open Vivado HW-Manager and add VIO signal to dashboard (*.ltx located on prebuilt folder).
PHY LED:
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Block Design
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PS Interfaces
| Type | Note |
|---|---|
| DDR | --- |
| QSPI | MIO |
| ETH0 | MIO |
| USB0 | MIO |
| SD0 | MIO |
| SD1 | MIO |
| UART0 | MIO |
| UART1 | MIO |
| I2C0 | MIOEMIO |
| I2C1 | EMIO |
| GPIO | MIO |
| TTC | EMIO |
Constrains
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| Code Block | ||||
|---|---|---|---|---|
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# # Constraints for System controller support logic # set_property PACKAGE_PIN K16 [get_ports PL_pin_K16] set_property PACKAGE_PIN K19 [get_ports PL_pin_K19] set_property PACKAGE_PIN K20 [get_ports PL_pin_K20] set_property PACKAGE_PIN L16 [get_ports PL_pin_L16] set_property PACKAGE_PIN M15 [get_ports PL_pin_M15] set_property PACKAGE_PIN N15 [get_ports PL_pin_N15] set_property PACKAGE_PIN N22 [get_ports PL_pin_N22] set_property PACKAGE_PIN P16 [get_ports PL_pin_P16] set_property PACKAGE_PIN P22 [get_ports PL_pin_P22] # # If Bank 34 is not 3.3V Powered need change the IOSTANDARD # set_property IOSTANDARD LVCMOS33 [get_ports PL_pin_P22] set_property IOSTANDARD LVCMOS33 [get_ports PL_pin_P16] set_property IOSTANDARD LVCMOS33 [get_ports PL_pin_N22] set_property IOSTANDARD LVCMOS33 [get_ports PL_pin_N15] set_property IOSTANDARD LVCMOS33 [get_ports PL_pin_M15] set_property IOSTANDARD LVCMOS33 [get_ports PL_pin_L16] set_property IOSTANDARD LVCMOS33 [get_ports PL_pin_K20] set_property IOSTANDARD LVCMOS33 [get_ports PL_pin_K19] set_property IOSTANDARD LVCMOS33 [get_ports PL_pin_K16] |
Software Design - SDK/HSI
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optional chapter
separate sections for different apps
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For SDK project creation, follow instructions from:
Application
FSBL
TE modified 2017.2 FSBL
Functions:
- Read EEPROM MAC Address and make Address accessible by UBOOT (need defines on uboot platform-top.h)
- Read CPLD Firmware and SoC Type
- Configure Marvell PHY
Changes:
- Add te_fsbl_config.h,, te_fsbl_hooks.h te_fsbl_hooks.c, and includ into fsbl_hooks.c
U-Boot
U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.
Software Design - PetaLinux
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optional chapter
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For PetaLinux installation and project creation, follow instructions from:
Config
- Subsystem Auto Hardware Settings:Serial Settings: ps7_uart_0
U-Boot
| Code Block | ||
|---|---|---|
| ||
#include <configs/platform-auto.h>
#define UBOOT_ENV_MAGIC 0xCAFEBABE
#define UBOOT_ENV_MAGIC_ADDR 0xFFFFFC00
#define UBOOT_ENV_ADDR 0xFFFFFC04
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Device Tree
#
# TE0701 I2C Bus
#
set_property PACKAGE_PIN W20 [get_ports iic_0_scl_io]
set_property PACKAGE_PIN W21 [get_ports iic_0_sda_io]
set_property IOSTANDARD LVCMOS25 [get_ports iic_0_scl_io]
set_property IOSTANDARD LVCMOS25 [get_ports iic_0_sda_io]
#
# ADV7511 Interface
#
set_property PACKAGE_PIN N20 [get_ports hdmi_out_clk]
set_property PACKAGE_PIN N19 [get_ports hdmi_out_de]
set_property PACKAGE_PIN R19 [get_ports hdmi_out_hsync]
set_property PACKAGE_PIN T19 [get_ports hdmi_out_vsync]
set_property PACKAGE_PIN T18 [get_ports {hdmi_out_data[0]}]
set_property PACKAGE_PIN R18 [get_ports {hdmi_out_data[1]}]
set_property PACKAGE_PIN R21 [get_ports {hdmi_out_data[2]}]
set_property PACKAGE_PIN R20 [get_ports {hdmi_out_data[3]}]
set_property PACKAGE_PIN M22 [get_ports {hdmi_out_data[4]}]
set_property PACKAGE_PIN K21 [get_ports {hdmi_out_data[5]}]
set_property PACKAGE_PIN M21 [get_ports {hdmi_out_data[6]}]
set_property PACKAGE_PIN J20 [get_ports {hdmi_out_data[7]}]
set_property PACKAGE_PIN T17 [get_ports {hdmi_out_data[8]}]
set_property PACKAGE_PIN J22 [get_ports {hdmi_out_data[9]}]
set_property PACKAGE_PIN T16 [get_ports {hdmi_out_data[10]}]
set_property PACKAGE_PIN J21 [get_ports {hdmi_out_data[11]}]
set_property IOSTANDARD LVCMOS25 [get_ports hdmi_*]
set_property PACKAGE_PIN AB16 [get_ports {cec_clk[0]}]
set_property PACKAGE_PIN AB17 [get_ports {ct_hpd[0]}]
set_property PACKAGE_PIN AA16 [get_ports {ls_oe[0]}]
set_property IOSTANDARD LVCMOS25 [get_ports {cec_clk[0]}]
set_property IOSTANDARD LVCMOS25 [get_ports {ct_hpd[0]}]
set_property IOSTANDARD LVCMOS25 [get_ports {ls_oe[0]}]
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Software Design - SDK/HSI
| HTML |
|---|
<!--
optional chapter
separate sections for different apps
--> |
For SDK project creation, follow instructions from:
Application
FSBL
TE modified 2017.2 FSBL
Functions:
- Read EEPROM MAC Address and make Address accessible by UBOOT (need defines on uboot platform-top.h)
- Read CPLD Firmware and SoC Type
- Configure Marvell PHY
Changes:
- Add te_fsbl_config.h,, te_fsbl_hooks.h te_fsbl_hooks.c, and includ into fsbl_hooks.c
U-Boot
U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.
Software Design - PetaLinux
| HTML |
|---|
<!--
optional chapter
Add "No changes." or "Activate: and add List"
--> |
For PetaLinux installation and project creation, follow instructions from:
Config
- Subsystem Auto Hardware Settings:Serial Settings: ps7_uart_0
U-Boot
| Code Block | ||
|---|---|---|
| ||
#include <configs/platform-auto.h>
#define UBOOT_ENV_MAGIC 0xCAFEBABE
#define UBOOT_ENV_MAGIC_ADDR 0xFFFFFC00
#define UBOOT_ENV_ADDR 0xFFFFFC04
|
Device Tree
| Code Block | ||
|---|---|---|
| ||
/include/ "system-conf.dtsi"
/ {
};
/ {
memory { // Reduce memory for framebuffers
device_type = "memory";
reg = <0x0 0x3FC00000>;
};
framebuffer0: framebuffer@0x3FC00000 { // HDMI out
compatible = "simple-framebuffer";
reg = <0x3FC00000 (1280 * 720 * 4)>; // 720p
width = <1280>; // 720p
height = <720>; // 720p
stride = <(1280 * 4)>; // 720p
format = "a8b8g8r8";
};
};
/* Disable standard VDMA driver to prevent core reset */
&axi_vdma_0 {
status = "disabled";
};
/* Disable timing controller deriver*/
&v_tc_0 {
status = "disabled";
};
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| Code Block | ||
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/include/ "system-conf.dtsi"
/ {
};
/* default */
/* Flash */
&qspi {
flash0: flash@0 {
compatible = "w25q256";
};
};
/* ETH PHY */
&gem0 {
phy-handle = <&phy0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@0 {
compatible = "marvell,88e1510";
device_type = "ethernet-phy";
reg = <0>;
};
};
};
/* USB PHY */
/{
usb_phy0: usb_phy@0 {
compatible = "ulpi-phy";
//compatible = "usb-nop-xceiv";
#phy-cells = <0>;
reg = <0xe0002000 0x1000>;
view-port = <0x0170>;
drv-vbus;
};
};
&usb0 {
dr_mode = "host";
//dr_mode = "peripheral";
usb-phy = <&usb_phy0>;
};
/* I2C need I2C1 connected to te0720 system controller ip */
&i2c1 {
iexp@20 { // GPIO in CPLD
#gpio-cells = <2>;
compatible = "ti,pcf8574";
reg = <0x20>;
gpio-controller;
};
iexp@21 { // GPIO in CPLD
#gpio-cells = <2>;
compatible = "ti,pcf8574";
reg = <0x21>;
gpio-controller;
};
rtc@6F { // Real Time Clock
compatible = "isl12022";
reg = <0x6F>;
};
};
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...
Activate:
- RTC_DRV_ISL12022
- CONFIG_FB_SIMPLE
- CONFIG_LOGO
- CONFIG_LOGO_LINUX_MONO
- CONFIG_LOGO_LINUX_VGA16
- CONFIG_LOGO_LINUX_CLUT224
Rootfs
Activate:
- i2c-tools
Applications
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