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anchorFigure_3
titleFigure 3: Power Distribution Diagram
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draw.io Diagram
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diagramNameTEI0003 Power distribution diagram
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Power Consumption

FPGADesignTypical Power, 25C ambient
Intel MAX 10 10M08 FPGA SoCNot configuredTBD*

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Bank Voltages

3.3V

Bank

Voltage

Voltage Range

123.3Vall bank voltages fixed2
33.3V
453.3V
563.3V
61A3.3V
71B3.3V
83.3V

Table 14: FPGA SoC VCCO bank voltages

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Parameter

MinMax

Units

Reference document

VIN supply voltage (5.0V nominal)

-0.3

6.0

V

EP53A7HQI / EP53A7LQI datasheet
I/O Input voltage for FPGA I/O bank-0.54.212VIntel MAX 10 datasheet

Storage Temperature

-40

+90

°C

LED R6C-AL1M2VY/3T datasheet

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titleFigure 5: Module hardware revision number

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Document Change History

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Revision

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Ali Naseri

  • First TRM release

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