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anchor	Figure_OV_MC
title	TEBA0714 main components

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draw.io Diagram

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6-SMT pin header J26 for selecting PL-bank I/O voltage6-, J26
SMT pin header, J27 for selecting XMOD/JTAG VCCIO
Samtec Razor Beam™ LSHM-150 B2B connector, JM1
Board to Board (B2B) Connector, JM1
Board to Board (B2B) ConnectorrSamtec Razor Beam™ LSHM-150 B2B connector, JM2
XMOD header, JX1
Voltage Regulator, U1
User Red LED, D2
User Green LED, D1 (redRed)
SFP+ Connector, J1
User Red LED D3, indicating FPGA's 'Programming DONE'-signal, D3
50-pin header solder pads J20 for access to SoM's PL I/O-banks (LVDS pairs possible)pad, J20
16-pin header solder pads pad, J3, JTAG/UART header with ADC and MGT clock input
10-pin header solder pads J4 for access to SoM's PL I/O-banks (LVDS pairs possible)pad, J4
50-pin header solder pads J17 for access to SoM's PL I/O-banks (LVDS pairs possible)pad, J17

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hidden	true
id	Comments

Notes :

Only components like EEPROM, QSPI flash and DDR3 can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

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anchor	Figure_PWR_PD
title	Power Distribution

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draw.io Diagram

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anchor	Figure_PWR_PS
title	Power Sequency

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draw.io Diagram

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anchor	Table_PWR_PR
title	Module power rails.

Scroll Table Layout

Power Rail Name	B2B Connector JM1 Pin	B2B Connector JM2 Pin	Direction
3.3V	99,97	-	Input
1.8V	-	18	Input
3.3V_OUT	83	54	Output
VCCIO34	61	-	Input
V_CFG0	53	-	Input

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