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Scroll Title
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titleInitial delivery state of programmable devices on the module

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Storage device name

Content

Notes

SPI Flash

Not programmed 


EEPROMNot Programmed 


Clock GeneratorProgrammed


Configuration Signals

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  • Overview of Boot Mode, Reset, Enables.

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Scroll Title
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titleQuad SPI interface MIOs and pins

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SchematicU11 PinNotes
SPI-CSCS
SPI-CLKCLK
SPI-DQODI/IO0
SPI_DQ3HOLD/IO3
SPI-DQ2WP/IO2
SPI-DQ1DO/IO1
1.8VVCC


EEPROM

A Microchip 24LC128-I/LC serial EEPROM (U4) is provided for IPMI data. It is accessible via the LPC FMC connector J1 (SCL, SDA).

Scroll Title
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titleI2C EEPROM interface MIOs and pins

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Vita 57 ConnectorSchematicU4 PinNotes
J1F-SCLFMC_SCLSCL
J1F-SDAFMC_SDASDA
J1F-GA0GA0A0
J1F-GA1GA1A1


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titleOsillators

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DesignatorDescriptionFrequencyNote
U4Oscillator, 25 MHzMHz
U10Programmable Clock GeneratorMHz


Programmable Clock Generator

There is a Silicon Labs I2C programmable clock generator on-board (U10) to generate reference clocks for the module. Programming can be done using I2C via PIN header J8. 

Si5345A Pin
Signal Name / Description
Connected ToDirectionNote

IN0

Reference input clock.

U11Input25.00 MHz oscillator, SiT8008BI
IN1-3-Not Connected

A1

-

GNDInputI2C slave device address LSB.
XACX3225SB54000XB-Y1Input54.0000 MHz XTAL CX3225SB

OUT0

CLKPLL2F

U5-H6/G5Output

FPGA bank 2.

OUT1-Not connected.OutputNot used.
OUT2GBTCLK1J2-B20/B21OutputM2C via HPC FMC.
OUT3-Not connected.OutputNot used.
OUT4-Not connected.OutputNot used.
OUT5-Not connected.OutputNot used.
OUT6

-

Not connected.

Output

Not used.
OUT7GBTCLK0J2-D4/D5OutputM2C via HPC FMC.
OUT8CLK0J2-H4/H5OutputM2C via HPC FMC.
OUT9CLK1J2-G2/G3OutputM2C via HPC FMC.

 Table 9: Programmable clock generator inputs and outputs.

Power and Power-On Sequence

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