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Comment: Reverted from v. 367

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Important General Note:

  • If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable
  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template:

        Scroll Title
        anchorFigure_anchorname
        titleText


        Scroll Ignore

        Create DrawIO object here: Attention if you copy from other page, objects are only linked.


        Scroll Only

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll PDF export bug is fixed



      • Table template:

        • Layout macro can be use for landscape of large tables

      • Scroll Title
        anchorTable_tablename
        titleText

        Scroll Table Layout
        orientationportrait
        sortDirectionASC
        repeatTableHeadersdefaultstyle
        widthssortByColumn1
        sortEnabledfalse
        cellHighlightingtrue

        ExampleComment
        12



    • The anchors of the Scroll Title should be named consistent across TRMs. An incomplete list of examples is given below

      • <type>_<main section>_<name>

        • type: Figure, Table
        • main section:
          • "OV" for Overview
          • "SIP" for Signal Interfaces and Pins,
          • "OBP" for On board Peripherals,
          • "PWR" for Power and Power-On Sequence,
          • "B2B" for Board to Board Connector,
          • "TS" for Technical Specification
          • "VCP" for Variants Currently in Production
          •  "RH" for Revision History
        • name: custom, some fix names, see below
      • Fix names:
        • "Figure_OV_BD" for Block Diagram

        • "Figure_OV_MC" for Main Components

        • "Table_OV_IDS" for Initial Delivery State

        • "Table_PWR_PC" for Power Consumption

        • "Figure_PWR_PD" for Power Distribution
        • "Figure_PWR_PS" for Power Sequence
        • "Figure_PWR_PM" for Power Monitoring
        • "Table_PWR_PR" for Power Rails
        • "Table_PWR_BV" for Bank Voltages
        • "Table_TS_AMR" for Absolute_Maximum_Ratings

        • "Table_TS_ROC" for Recommended_Operating_Conditions

        • "Figure_TS_PD" for Physical_Dimensions
        • "Table_VCP_SO" for TE_Shop_Overview
        • "Table_RH_HRH" for Hardware_Revision_History

        • "Figure_RH_HRN" for Hardware_Revision_Number
        • "Table_RH_DCH" for Document_Change_History
    • Use Anchor in the document: add link macro and add "#<anchorname>
    • Refer to Anchror from external : <page url>#<pagename without space characters>-<anchorname>

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Scroll Title
anchorFigure_OV_BD
titleTE0728 block diagram


Scroll Ignore

draw.io Diagram
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Main Components

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Scroll Title
anchorFigure_OV_MC
titleTE0728 main components


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50diagramNameTE0728_MC2
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Scroll Title
anchorTable_OV_IDS
titleInitial delivery state of programmable devices on the module

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Storage Device

Symbol

Content

Quad SPI Flash

U13

Not Programmed

EEPROMU11Not Programmed


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Scroll Title
anchorTable_OV_BP
titleBoot process.

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Signal

FPGA BankPinB2BSignal StateBoot Mode

Boot_R

500

E4

J2-11

Low

QSPI

HighSD Card


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Scroll Title
anchorTable_OV_RST
titleReset process.

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Signal

B2BI/ONote

Reset

J2-7InputComes from Carrier
RST_OUTJ2-9OutputPS_PROB_B


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Scroll Title
anchorTable_SIP_B2B
titleGeneral PL I/O to B2B connectors information

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FPGA BankTypeB2B ConnectorI/O Signal CountVoltage LevelNotes
13HRJ148 Single ended (24 Diff)VCCO_13variable from carrier
500MIOJ14 Singel ended3.3V
501MIOJ238 Singel endedVMIO1variable from carrier
33HRJ334 Single ended (17 Diff)3.3V
35HR

J3

J2

20 Single ended (10 Diff)

22 Single ended (11 Diff)

3.3V


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Scroll Title
anchorTable_SIP_B2B_Eth
titleEthernet PHY B2B connectors.

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SchematicETH1ETH2DirectionNotes
CTREFJ3-57J3-25InMagnetics center tap voltage
TD+J3-58J3-28OutTransfer
TD-J3-56J3-26Out
RD+J3-52J3-22InReceive
RD-J3-50J3-20In
LED1J3-55J3-23OutLED Yellow on carrier, multiple usage-ACK
LED2J3-53J3-21Out
LED3J3-51J3-19OutLED Green on carrier, multiple usage-Link
POWERDOWN/INTL21R20In
RESET_NM15R16InActive low PHY Reset


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Scroll Title
anchorTable_SIP_B2B_CAN
titleCAN B2B connectors.

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SchematicB2BDirectionNotes
CANH/CANLJ1-2/J1-4Inout/Inout


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Scroll Title
anchorTable_SIP_JTG
titleJTAG pins connection

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JTAG Signal

B2B Pin

TMSJ2-12
TDIJ2-10
TDOJ2-8
TCKJ2-6


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Scroll Title
anchorTable_OBP_MIOs
titleMIOs pins

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MIO PinConnected toB2BNotes
MIO0MIO0-RTC interrupt
MIO1...MIO6

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

-SPI Flash
MIO7LED RED-LED
MIO8/MIO9Tx/Rx-CAN Transceiver
MIO10...MIO13IO_0 ... IO_3J1GPIO
MIO14/MIO15SCL/SDA-I2C
MIO16...MIO39-J2GPIO
MIO40...MIO48CLK, Cmd, Data0...Data3, wp, cdJ2SD
MIO48PS_MIO48_501J2LED Red on Carrier
MIO49PS_MIO49_501J2LED Yellow on Carrier
MIO50PS_MIO49_501J2LED Green on Carrier
MIO51PS_MIO51_501J2GPIO
MIO52/MIO53UART_Txd / UART_RxdJ2UART transfer/recieve


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Scroll Title
anchorTable_OBP
titleOn board peripherals

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Chip/InterfaceDesignatorNotes
QSPI FlashU13---
EEPROMU11EEPROM
RTCU7Real Time Clock
DDR3 SDRAMU1Volatile Memory
EthernetU3, U10Two 100 Mbit Ethernet PHY
CAN TransceiverU16---
User LEDD4Green LED
OscillatorsU14, U7, U5Clock Sources


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Scroll Title
anchorTable_OBP_SPI
titleQuad SPI interface MIOs and pins

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MIO PinSchematicNotes
MIO1SPI_CS
MIO2SPI_DQ0/M0
MIO3SPI_DQ1/M1
MIO4SPI_DQ2/M2
MIO5SPI_DQ3/M3
MIO6SPI_SCK/M4


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Scroll Title
anchorTable_OBP_I2C_RTC
titleI2C Address for RTC

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MIO PinI2C AddressDesignatorNotes
MIO14...150x56U7Slave address


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Scroll Title
anchorTable_OBP_I2C_EEPROM
titleI2C address for EEPROM

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MIO PinI2C AddressDesignatorNotes
MIO14...150x50U11Slave address


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Scroll Title
anchorTable_OBP_LED
titleOn-board LEDs

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DesignatorColorConnected toActive Level
D9GreenDONELow
D8REDMIO7High
D4GreenBank 33 - V18High


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Scroll Title
anchorTable_OBP_ETH
titleEthernet PHY to Zynq SoC connections

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BankSignal NameETH1ETH2Signal Description
34ETH-RSTM15R16Ethernet reset, active-low.
34ETH_COLL16P20
34MDCP16T17

Ethernet management clock.

34MDIOM16T16Ethernet management data.
34ETH_TX_D0J22N22Ethernet transmit data 0. Output to Ethernet PHY.
34ETH_TX_D1M17P21Ethernet transmit data 1. Output to Ethernet PHY.
34ETH_TX_D2K21P22Ethernet transmit data 2. Output to Ethernet PHY.
34ETH_TX_D3M22R21Ethernet transmit data 3. Output to Ethernet PHY.
34ETH_TX_ENJ21M21Ethernet transmit enable.
34ETH_RX_D0L17R18Ethernet receive data 0. Input from Ethernet PHY. 
34ETH_RX_D1K18R19Ethernet receive data 1. Input from Ethernet PHY. 
34ETH_RX_D2J18T18Ethernet receive data 2. Input from Ethernet PHY. 
34ETH_RX_D3J20T19Ethernet receive data 3. Input from Ethernet PHY. 
34ETH_RX_DVN17P15Ethernet receive data valid.


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Scroll Title
anchorTable_OBP_CAN
titleCAN Tranciever interface MIOs

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BankSignal nameNotes
500D - TxDriver Input
500R - RxReciever Output


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Scroll Title
anchorTable_OBP_CLK
titleOsillators

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DesignatorDescriptionFrequencyUsed as
U14MEMS Oscillator50 MHzPS_CLK
U5MEMS Oscillator25 MHzEthernet PHY Clock
U7RTC (internal oscillator)32.768 KHzCLKOUT of RTC is not connected


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Scroll Title
anchorTable_PWR_PC
titlePower Consumption

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Power Input PinTypical Current
VINTBD*


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Scroll Title
anchorFigure_PWR_PD
titlePower Dependencies


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Power on Sequence

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Scroll Title
anchorFigure_PWR_PS
titlePower On Sequence


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Scroll Title
anchorFigure_PWR_VMC
titleVoltage Monitor Circuit


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Scroll Title
anchorTable_PWR_PR
titleModule power rails.

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Power Signal

B2B

JM1 Pin

B2B

JM2 Pin

B2B

JM3 Pin

DirectionNotes
VIN1,3--InputSupply voltage from carrier board.
VCCO_1339--Input
VBATT-1-OutputRTC Supply voltage
3.3V19425,57OutputInternal 3.3V voltage level.
VMIO

-

2
InputVariable and supplied by carrier

1.8V

-5-OutputInternal 1.8V voltage level.


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Scroll Title
anchorTable_PWR_BV
titleZynq SoC bank voltages.

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Bank          

Schematic Name

Voltage

I/O TypeNotes
500VCCO_MIO0_5003.3VMIO
501

VCCO_MIO1_501

2.5V or 3.3VMIOsupplied by carrier.
502VCCO_DDR_5021.5VDDR3
13VCCO_131.8V or 3.3VHRSupplied by the carrier board. J1
333.3V3.3VHRSupplied by carrier board. J3
343.3V3.3VHR


353.3V3.3VHR

Supplied by the carrier board. J2, J3


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Scroll Title
anchorTable_TS_AMR
titleAbsolute maximum ratings

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SymbolsMinMaxUnitDescription
VIN supply voltage-0.365VTPS54260-Q1 datasheets.
VMIO-0.53.6VPS MIO I/O supply voltage
VCCO-0.53.6VPL supply voltage for HR I/O banks
Storage Temperature-40+85°C


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anchorTable_TS_ROC
titleRecommended operating conditions

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SymbolMinMaxUnitsReference Document
VIN supply voltage3.560VTPS54260-Q1 datasheets.
VMIO1.713.465VSee Xilinx DS187 data sheet.
VCCO1.143.465VSee Xilinx DS187 datasheet.
Operating Temperature-40+105°C


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anchorFigure_TS_PD
titlePhysical Dimension


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Scroll Title
anchorTable_VCP_SO
titleTrenz Electronic Shop Overview

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Trenz shop TE0728 overview page
English pageGerman page


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anchorTable_RH_HRH
titleHardware Revision History

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DateRevisionChanges

 2016-08-18

04
  • U1 DDR3 IC changed from NT5CB256M16CP-DIH to NT5CC256M16CP-DIH
  • Net DDR3-ODT0: added series resistor R55
  • Added Traceability pad
  • Net PS-POR-B: added pull-down resistor R56
 2015-12-0103
  • ...
2015-06-1202
  • ...
2015-03-0301
  • ...


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Scroll Title
anchorTable_RH_DCH
titleDocument change history.

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DateRevisionContributorDescription

Page info
infoTypeModified date
dateFormatyyyy-MM-dd
typeFlat

Page info
infoTypeCurrent version
prefixv.
typeFlat
showVersionsfalse

Page info
infoTypeModified by
typeFlat
showVersionsfalse

  • initial release

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all

Page info
infoTypeModified users
typeFlat
showVersionsfalse

  • --


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