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  1. SMA Connectors, J1,J3,J5,J7,J9,J11
  2. U.FL (UMCC) Connectors, J2,J4,J6,J8, J10, J12...16
  3. Green LEDs, D6...11
  4. B2B Connector, J18
  5. B2B Connector, J17
  6. Micro SD Card Connector, J28
  7. Reset Push Button, BTN1
  8. Mosfet Transistors
  9. PCIe Connector, J19
  10. Micro USB2.0 Connectors, J29-J30
  11. Gigabit RJ45 Connector, J31
  12. DIP Switch, S1
  13. UEC5 Connector, J22,J24
  14. UCC8 Connector, J23,J25
  15. 4x1 Pin Header, J21
  16. FTDI, U12
  17. Green LEDs, D1...3
  18. 4x1 Pin Header, J20
  19. EEPROM, U15
  20. PCIe -8x-kurz ConnectorCard, J26

Initial Delivery State

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Scroll Title
anchorTable_OV_RST
titleReset process.

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Signal

B2BI/ONote

RESETN

J17- 36InputConnected to Push Button, BTN1


Signals, Interfaces and Pins

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Scroll Title
anchorTable_SIP_B2B
titleGeneral PL I/O to B2B connectors information

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FPGA BankB2B ConnectorI/O Signal CountVoltage LevelNotes

JTAG Interface

JTAG access to the TEB0835 SoM through B2B connector JM2.

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anchorTable_SIP_JTG
titleJTAG pins connection

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JTAG Signal

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B2B Connector

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MIO Pins

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hiddentrue
idComments

you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

Bank 500J1712x Single Ended1.8VMIO14...25
Bank 501J1720x Single Ended1.8VMIO26...51
Bank 505J1718x Single Ended, 9x Differential pairs0.85VEXT_CLKIN_PSMGT, RX/TX0...3
Bank 128J1718x Single Ended, 9x Differential pairs0.9VB128_CLK, RX/TX0...3
Bank 129J1718x Single Ended, 9x Differential pairs0.9VB129_CLK, RX/TX0...3
Bank 65J1824x Single Ended, 12x Differential pairs1.8V
Bank 88J1816x Single Ended, 8x Differential pairs3.3VHD_B88


JTAG Interface

JTAG access to the TEB0835 SoM through B2B connector JM2.

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SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

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anchorTable_SIP_MIOs
titleMIOs pins

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Test Points

you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.

Example:

Page properties
hiddentrue
idComments
Test PointSignalB2BNotes
10PWR_PL_OKJ2-120
Scroll Title
anchorTable_SIP_TPsJTG
titleTest Points InformationJTAG pins connection

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Test PointSignalConnected toNotes

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JTAG Signal

B2B Connector

TMS
TDI
TDO
TCK


JTAG_EN


MIO Pins

Page properties
hiddentrue
idComments

Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs

you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

MIO PinConnected toB2BNotes
MIO12...14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

J2QSPI
Page properties
hiddentrue
idComments

Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection



Scroll Title
anchorTable_OBPSIP_MIOs
titleOn board peripheralsMIOs pins

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Chip/InterfaceDesignatorNotes

Quad SPI Flash Memory

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idComments

Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.

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MIO PinConnected toB2BNotes





































Test Points

Page properties
hiddentrue
idComments

you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.

Example:

Test PointSignalB2BNotes
10PWR_PL_OKJ2-120



U?? Pin
Scroll Title
anchorTable_OBPSIP_SPITPs
titleQuad SPI interface MIOs and pinsTest Points Information

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MIO Pin
Test Point
Schematic
SignalConnected toNotes





































On-board Peripherals

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Page propertiesscroll-title
hiddentrue
idComments

Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs


Notes

Page properties
hiddentrue
idComments

Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection

anchorTable_OBP_RTC
titleI2C interface MIOs and pins
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MIO PinSchematicU? Pin


I2C Address
Scroll Title
anchorTable_OBP_I2C_RTC
titleI2C Address for RTCOn board peripherals

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Chip/Interface
MIO Pin
DesignatorNotes

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RTC

Scroll Title
anchorTable_OBP_EEPRTC
titleI2C EEPROM interface MIOs and pins

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MIO PinSchematicU? ? PinNotes










Scroll Title
anchorTable_OBP_I2C_EEPROMRTC
titleI2C address Address for EEPROMRTC

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MIO PinI2C AddressDesignatorNotes

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EEPROM

Scroll Title
anchorTable_OBP_LEDEEP
titleOn-board LEDsI2C EEPROM interface MIOs and pins

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DesignatorColorConnected toActive LevelNote

DDR3 SDRAM

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idComments

Notes :

Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3)

The TE???? SoM has ??? GByte volatile DDR3 SDRAM IC for storing user application code and data.

  • Part number: 
  • Supply voltage:
  • Speed: 
  • NOR Flash
  • Temperature: 

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MIO PinSchematicU?? PinNotes










Scroll Title
anchorTable_OBP_I2C_EEPROM
titleI2C address for EEPROM

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MIO PinI2C AddressDesignatorNotes





LEDs

Signal Name
Scroll Title
anchorTable_OBP_ETHLED
titleEthernet PHY to Zynq SoC connectionsOn-board LEDs

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DesignatorColor
U?? Pin 
Connected to
Signal Description
Active LevelNote