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- SMA Connectors, J1,J3,J5,J7,J9,J11
- U.FL (UMCC) Connectors, J2,J4,J6,J8, J10, J12...16
- Green LEDs, D6...11
- B2B Connector, J18
- B2B Connector, J17
- Micro SD Card Connector, J28
- Reset Push Button, BTN1
- Mosfet Transistors
- PCIe Connector, J19
- Micro USB2.0 Connectors, J29-J30
- Gigabit RJ45 Connector, J31
- DIP Switch, S1
- UEC5 Connector, J22,J24
- UCC8 Connector, J23,J25
- 4x1 Pin Header, J21
- FTDI, U12
- Green LEDs, D1...3
- 4x1 Pin Header, J20
- EEPROM, U15
- PCIe -8x-kurz ConnectorCard, J26
Initial Delivery State
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anchor | Table_OV_RST |
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title | Reset process. |
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orientation | portrait |
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sortEnabled | false |
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cellHighlighting | true |
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Signal | B2B | I/O | Note |
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RESETN | J17- 36 | Input | Connected to Push Button, BTN1 |
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Signals, Interfaces and Pins
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anchor | Table_SIP_B2B |
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title | General PL I/O to B2B connectors information |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortEnabled | false |
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cellHighlighting | true |
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FPGA Bank | B2B Connector | I/O Signal Count | Voltage Level | Notes |
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JTAG Interface
JTAG access to the TEB0835 SoM through B2B connector JM2.
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anchor | Table_SIP_JTG |
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title | JTAG pins connection |
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JTAG Signal
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B2B Connector
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MIO Pins
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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.
Example:
Bank 500 | J17 | 12x Single Ended | 1.8V | MIO14...25 | Bank 501 | J17 | 20x Single Ended | 1.8V | MIO26...51 | Bank 505 | J17 | 18x Single Ended, 9x Differential pairs | 0.85V | EXT_CLKIN_PSMGT, RX/TX0...3 | Bank 128 | J17 | 18x Single Ended, 9x Differential pairs | 0.9V | B128_CLK, RX/TX0...3 | Bank 129 | J17 | 18x Single Ended, 9x Differential pairs | 0.9V | B129_CLK, RX/TX0...3 | Bank 65 | J18 | 24x Single Ended, 12x Differential pairs | 1.8V |
| Bank 88 | J18 | 16x Single Ended, 8x Differential pairs | 3.3V | HD_B88 |
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JTAG Interface
JTAG access to the TEB0835 SoM through B2B connector JM2.
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SPI_CS , SPI_DQ0... SPI_DQ3
SPI_SCK
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anchor | Table_SIP_MIOs |
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title | MIOs pins |
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Test Points
Page properties |
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you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.
Example:
Test Point | Signal | B2B | Notes |
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10 | PWR_PL_OK | J2-120 | Scroll Title |
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anchor | Table_SIP_TPsJTG |
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title | Test Points InformationJTAG pins connection |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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Test Point | Signal | Connected to | Notes |
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JTAG Signal | B2B Connector |
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TMS |
| TDI |
| TDO |
| TCK |
| JTAG_EN |
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MIO Pins
Page properties |
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic. Example: MIO Pin | Connected to | B2B | Notes |
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MIO12...14 | SPI_CS , SPI_DQ0... SPI_DQ3 SPI_SCK | J2 | QSPI |
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Page properties |
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Notes : In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection
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anchor | Table_OBPSIP_MIOs |
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title | On board peripheralsMIOs pins |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default | style | widths |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Chip/Interface | Designator | Notes |
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Quad SPI Flash Memory
Page properties |
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Notes : Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options. |
| style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | Connected to | B2B | Notes |
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Test Points
Page properties |
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you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section. Example: Test Point | Signal | B2B | Notes |
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10 | PWR_PL_OK | J2-120 |
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Scroll Title |
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anchor | Table_OBPSIP_SPITPs |
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title | Quad SPI interface MIOs and pinsTest Points Information |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortEnabled | false |
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cellHighlighting | true |
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On-board Peripherals
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Page propertiesscroll-title |
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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Page properties |
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Notes : In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection |
anchor | Table_OBP_RTC |
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title | I2C interface MIOs and pins |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | widths | sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | Schematic | U? Pin | Notes
Scroll Title |
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anchor | Table_OBP_I2C_RTC |
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title | I2C Address for RTCOn board peripherals |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true | true |
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RTC
Scroll Title |
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anchor | Table_OBP_EEPRTC |
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title | I2C EEPROM interface MIOs and pins |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | Schematic | U? ? Pin | Notes |
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anchor | Table_OBP_I2C_EEPROMRTC |
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title | I2C address Address for EEPROMRTC |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | I2C Address | Designator | Notes |
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EEPROM
Scroll Title |
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anchor | Table_OBP_LEDEEP |
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title | On-board LEDsI2C EEPROM interface MIOs and pins |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Designator | Color | Connected to | Active Level | Note |
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DDR3 SDRAM
Page properties |
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Notes : Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3) |
The TE???? SoM has ??? GByte volatile DDR3 SDRAM IC for storing user application code and data.
- Part number:
- Supply voltage:
- Speed:
- NOR Flash
- Temperature:
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MIO Pin | Schematic | U?? Pin | Notes |
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anchor | Table_OBP_I2C_EEPROM |
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title | I2C address for EEPROM |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | I2C Address | Designator | Notes |
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LEDs
Scroll Title |
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anchor | Table_OBP_ETHLED |
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title | Ethernet PHY to Zynq SoC connectionsOn-board LEDs |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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U?? Pin | Signal NameSignal Description |
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Ethernet
Scroll Title |
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anchor | Table_OBP_CANETH |
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title | CAN Tranciever interface MIOsEthernet PHY to Zynq SoC connections |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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| Bank | Schematic PinNotes | D-Tx | Driver Input | R-Rx | Reciever OutputSignal Name | Connected to | Signal Description | Note |
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Clock Sources
Scroll Title |
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anchor | Table_OBP_CLK |
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title | Osillators |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Designator | Description | Frequency | Note |
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| MHz |
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Page properties |
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- This section is optional and only for modules.
use "include page" macro and link to the general B2B connector page of the module series, For example: 6 x 6 SoM LSHM B2B Connectors
Include Page |
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| PD:6 x 6 SoM LSHM B2B Connectors |
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| PD:6 x 6 SoM LSHM B2B Connectors |
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? x ? modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.
3 x REF-??????? (compatible to ????????), (?? pins, ?? per row)
The TE0835 has two Samtec Razor Beam on the bottom side.
Include Page |
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| PD:6 x 8 SoM SS5/ST5 B2B Connectors |
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| PD:6 x 8 SoM SS5/ST5 B2B Connectors |
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Technical Specifications
Absolute Maximum Ratings
Scroll Title |
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anchor | Table_TS_AMR |
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title | PS absolute maximum ratings |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Symbols | Description | Min | Max | Unit |
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| V | V | V | V | V | V | V |
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Recommended Operating Conditions
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Physical Dimensions
Module size: ?? 106.6 mm × ?? 167.7 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: ? 5 mm.
PCB thickness: ?? 1.5 mm.
Page properties |
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In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM. For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below: https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF
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Scroll Title |
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anchor | Table_RH_HRH |
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title | Hardware Revision History |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Revision | Changes | Documentation Link |
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2019-11-29 | REV01 | Initial Release | REV01 |
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Hardware revision number can be found on the PCB board together with the module model number separated by the dash.
Scroll Title |
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anchor | Figure_RV_HRN |
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title | Board hardware revision number. |
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Scroll Ignore |
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draw.io Diagram |
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border | true |
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viewerToolbar | true |
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fitWindow | false |
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diagramName | TEB0835_RV_HRN |
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simpleViewer | false |
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width | |
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diagramWidth | 641 |
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revision | 1 |
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Image Modified |
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Document Change History
Page properties |
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- Note this list must be only updated, if the document is online on public doc!
- It's semi automatically, so do following
Add new row below first Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template - Metadata is only used of compatibility of older exports
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