| Type | File Prefix | File Extention | Example | Description |
|---|
| Altium 3D export | 3D*- | .pdf | 3DT-TE0722-01.PDF | Static Altium 3D export of the PCB |
| Altium 3D PDF | PDF3D- | .pdf | PDF3D-TEB0745-02.PDF | Interactive 3D PDF of the PCB |
| Altium Project | AP- | .zip |
| Complete Altium CAD Project for reference |
| Altium Lib | AL- | .zip |
| Altium Library Files (.lib) compressed as ZIP-file |
| Application Note(s) | AN- | .pdf |
|
|
| Assembly Diagram | AD- | .pdf | AD-TE0715-02.pdf | Assembly Diagrams as pdf
|
| Advisory Note | AVAVN- | .pdf | AVAVN-TE0807_02_advisory_note.pdf |
|
| Bill of Materials | BOM- | .csv, .pdf, .xlsx, .ods |
|
|
| Block Diagram SVG | BD- | .svg | BD-TE0841-01.svg | Inkscape SVG file (for TE internal use only) |
| Block Diagram PNG | BD- | .png | BD-TE0841-01.png | Inkscape SVG export for TRMs, web, etc. |
| Cooler-STEP | STP- | .zip (.step),.pdf | STP-26923-TE0715-Heatsink.zip,26923-TE0715-Heatsink.pdf | Cooler 3D STEP (ISO 10303) model (.step) compressed as ZIP-file or pdf document |
| EDA library (file(s))* | --- | .LIB-xxx.zip (.lib) | TE0720 GigaZee JBx.LIB-Altium.zip | Altium/Eagle Library Files (.lib) compressed as ZIP-file |
| EDA project (file(s))* | --- | .PRJ-xxx.zip | TE0xxx-xx.PRJ-Altium.zip | Altium/Eagle Project Files
|
| Electronic Design Interchange Format | EDIF- | .zip (.edf) | EDIF-TE0600-03.zip | Altium EDIF export of the PCB |
| EU declaration of conformity | DoC- |
|
|
|
| Gerber Files | GB- | .zip |
| Manufacturing files (Gerber files and numerical control drill files) compressed as ZIP-file |
| Mechanical drawing | DIM- | .pdf | DIM-TE0803-03-No Variations.pdf | Module drawing with mechanical dimensions as pdf |
| Operating Instructions | OI- |
|
|
|
| Product Brief | PB- |
|
|
|
| PCB-STEP | STP- | .zip (.step) | STP-TE0715-02.zip | PCB 3D STEP (ISO 10303) model compressed as ZIP-file |
| PCN | PCN- | .pdf | PCN-20160114 TE0720-02 to TE0720-03, CPLD upgrade to REV05-v1-20160122_0830.pdf | Product change notifications |
| Pick and Place | PP- |
|
|
|
| Schematics | SCH- | .pdf | SCH-TE0726-02M.PDF | PCB Schematic as pdf |
| System Controller* | --- | .JED | SC0720_04_1AF.JED | Firmware for PCB-CPLDs (Lattice FPGA). Free Programmer Software available on Lattice Semiconductor. |
| System Controller File | SC-PGM- | .zip (.jed) | SC-PGM-TE790-02_STDRXTXSWAP-01_20160308.zip | System Controller Programming File. JED files are firmware for PCB-CPLDs (Lattice FPGA). Free Programmer Software available on Lattice Semiconductor. |
| System Controller Source | SC-PRJ- | .zip | SC-PRJ-TE790-02_STDRXTXSWAP-01_20160308.zip | System Controller Source Code and Project files for PCB-CPLDs (Lattice FPGA). Free Development Software available on Lattice Semiconductor. |
| Trace Length | TL- | .csv, .pdf, .xlsx, .xls, .ods, .zip |
| PCB Trace Length |
| Technical Reference Manual | TRM- | .pdf | TRM-TE0715-03.pdf |
|
| Vivado Design | --- | .zip | te0720-test_board-vivado_2016.2-build_03_20160630150948.zip | ZIP files with FPGA Reference Design as TCL script with Batch-Files to create the Vivado project.
Design- and Programmer Software available on Xilinx.
Attention: Only Programmer (LabTools) is freeware, but depending on FPGA, the Design-Software is not always free. |
| Vivado SDSoC | SDSoC_PFM_ | .zip | SDSoC_PFM_TE0803-01-02CG-1E_20180517163053.zip | SDSOC ready Platform Project (on older version *sdsoc.zip) |