Page History
...
This Design is based on min_linux, adding AXI_Ethernetlite IP Core.
| IP Core | Base address | Interrupt | Board Part Interface | Notes |
|---|---|---|---|---|
| AXI_Ethernetlite | 0x40E0_0000 | 3 | sys_ethernet | on TE0710 is connectd to MII, on TE0712 ist connected with the core "MII to RMII" to RMII |
TE0710 uses MII Interface
TE0712 uses RMII Interface
Overview
Content Tools