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Setting F32C BRAM size in Vivado IPI Address Editor.

Problem: it is not possible to assign an ELF files to the BRAM that we add in such way not directly in Vivado IPI. As workaround several options exist, we can create an BOOROM IP Core that can be connected to the LMB Bus holding the bootcode or we can create a BOOSTRAP IP Core that writes the bootrom code into the main BRAM and then releases F32C reset. Of course it is possible to merge the ELF into bitstream with console commands or TCL scripting.

Debug session in Vivado Labtools, when CPU Reset is asserted Instruction address bus freezes, but after release there seems to be no reset, F32C Core tries to continue from last PC Address.

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